Added support for aarch64 memory barrier instruction
authorSam Lantinga <slouken@libsdl.org>
Sun, 19 Nov 2017 23:36:54 -0800
changeset 11706d5d95b296cb0
parent 11705 88462f00ffac
child 11707 7960a740a126
Added support for aarch64 memory barrier instruction
include/SDL_atomic.h
     1.1 --- a/include/SDL_atomic.h	Fri Nov 17 11:03:02 2017 -0800
     1.2 +++ b/include/SDL_atomic.h	Sun Nov 19 23:36:54 2017 -0800
     1.3 @@ -158,6 +158,9 @@
     1.4  #if defined(__GNUC__) && (defined(__powerpc__) || defined(__ppc__))
     1.5  #define SDL_MemoryBarrierRelease()   __asm__ __volatile__ ("lwsync" : : : "memory")
     1.6  #define SDL_MemoryBarrierAcquire()   __asm__ __volatile__ ("lwsync" : : : "memory")
     1.7 +#elif defined(__GNUC__) && defined(__aarch64__)
     1.8 +#define SDL_MemoryBarrierRelease()   __asm__ __volatile__ ("dmb ish" : : : "memory")
     1.9 +#define SDL_MemoryBarrierAcquire()   __asm__ __volatile__ ("dmb ish" : : : "memory")
    1.10  #elif defined(__GNUC__) && defined(__arm__)
    1.11  #if defined(__ARM_ARCH_7__) || defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_7R__) || defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7S__)
    1.12  #define SDL_MemoryBarrierRelease()   __asm__ __volatile__ ("dmb ish" : : : "memory")