Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
authorSam Lantinga <slouken@libsdl.org>
Tue, 18 Nov 2003 01:27:06 +0000
changeset 73922dbf364c017
parent 738 82b85b731fe3
child 740 e70f80e98f60
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
WhatsNew
configure.in
include/Makefile.am
include/SDL_cpuinfo.h
src/audio/SDL_mixer.c
src/cpuinfo/COPYING.LIB
src/cpuinfo/Makefile.am
src/cpuinfo/README
src/cpuinfo/SDL_cpuinfo.c
src/cpuinfo/_cpuinfo.asm
src/cpuinfo/_pcihelp.asm
src/cpuinfo/cpuinfo.h
src/cpuinfo/gcpuinfo.c
src/cpuinfo/scitech.mac
src/video/SDL_RLEaccel.c
src/video/SDL_blit.c
src/video/SDL_blit_A.c
src/video/SDL_blit_N.c
src/video/SDL_yuv_sw.c
     1.1 --- a/WhatsNew	Fri Nov 14 20:21:22 2003 +0000
     1.2 +++ b/WhatsNew	Tue Nov 18 01:27:06 2003 +0000
     1.3 @@ -3,6 +3,9 @@
     1.4  
     1.5  Version 1.0:
     1.6  
     1.7 +1.2.7:
     1.8 +	Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE()
     1.9 +
    1.10  1.2.6:
    1.11  	Added SDL_LoadObject(), SDL_LoadFunction(), and SDL_UnloadObject()
    1.12  
     2.1 --- a/configure.in	Fri Nov 14 20:21:22 2003 +0000
     2.2 +++ b/configure.in	Tue Nov 18 01:27:06 2003 +0000
     2.3 @@ -503,6 +503,7 @@
     2.4              CFLAGS="$CFLAGS -I\$(top_srcdir)/src/hermes"
     2.5              SDL_EXTRADIRS="$SDL_EXTRADIRS hermes"
     2.6              SDL_EXTRALIBS="$SDL_EXTRALIBS hermes/libhermes.la"
     2.7 +            use_nasm=yes
     2.8          fi
     2.9      fi
    2.10  }
    2.11 @@ -2569,6 +2570,7 @@
    2.12  # More automake conditionals
    2.13  AM_CONDITIONAL(USE_DIRECTX, test x$use_directx = xyes)
    2.14  AM_CONDITIONAL(USE_CLONE, test x$use_clone = xyes)
    2.15 +AM_CONDITIONAL(HAVE_NASM, test x$use_nasm = xyes)
    2.16  
    2.17  # Set conditional variables for shared and static library selection.
    2.18  # These are not used in any Makefile.am but in sdl-config.in.
    2.19 @@ -2774,6 +2776,7 @@
    2.20  src/timer/Makefile
    2.21  src/endian/Makefile
    2.22  src/file/Makefile
    2.23 +src/cpuinfo/Makefile
    2.24  src/hermes/Makefile
    2.25  sdl-config
    2.26  SDL.spec
     3.1 --- a/include/Makefile.am	Fri Nov 14 20:21:22 2003 +0000
     3.2 +++ b/include/Makefile.am	Tue Nov 18 01:27:06 2003 +0000
     3.3 @@ -11,6 +11,7 @@
     3.4  	SDL_byteorder.h		\
     3.5  	SDL_cdrom.h		\
     3.6  	SDL_copying.h		\
     3.7 +	SDL_cpuinfo.h		\
     3.8  	SDL_endian.h		\
     3.9  	SDL_error.h		\
    3.10  	SDL_events.h		\
     4.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     4.2 +++ b/include/SDL_cpuinfo.h	Tue Nov 18 01:27:06 2003 +0000
     4.3 @@ -0,0 +1,58 @@
     4.4 +/*
     4.5 +    SDL - Simple DirectMedia Layer
     4.6 +    Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002  Sam Lantinga
     4.7 +
     4.8 +    This library is free software; you can redistribute it and/or
     4.9 +    modify it under the terms of the GNU Library General Public
    4.10 +    License as published by the Free Software Foundation; either
    4.11 +    version 2 of the License, or (at your option) any later version.
    4.12 +
    4.13 +    This library is distributed in the hope that it will be useful,
    4.14 +    but WITHOUT ANY WARRANTY; without even the implied warranty of
    4.15 +    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
    4.16 +    Library General Public License for more details.
    4.17 +
    4.18 +    You should have received a copy of the GNU Library General Public
    4.19 +    License along with this library; if not, write to the Free
    4.20 +    Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
    4.21 +
    4.22 +    Sam Lantinga
    4.23 +    slouken@libsdl.org
    4.24 +*/
    4.25 +
    4.26 +#ifdef SAVE_RCSID
    4.27 +static char rcsid =
    4.28 + "@(#) $Id$";
    4.29 +#endif
    4.30 +
    4.31 +/* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
    4.32 +/* CPU feature detection for SDL                                       */
    4.33 +
    4.34 +#ifndef _SDL_cpuinfo_h
    4.35 +#define _SDL_cpuinfo_h
    4.36 +
    4.37 +#include "begin_code.h"
    4.38 +/* Set up for C function definitions, even when using C++ */
    4.39 +#ifdef __cplusplus
    4.40 +extern "C" {
    4.41 +#endif
    4.42 +
    4.43 +/* This function returns true if the CPU has MMX features
    4.44 + */
    4.45 +extern DECLSPEC SDL_bool SDLCALL SDL_HasMMX();
    4.46 +
    4.47 +/* This function returns true if the CPU has 3DNow features
    4.48 + */
    4.49 +extern DECLSPEC SDL_bool SDLCALL SDL_Has3DNow();
    4.50 +
    4.51 +/* This function returns true if the CPU has SSE features
    4.52 + */
    4.53 +extern DECLSPEC SDL_bool SDLCALL SDL_HasSSE();
    4.54 +
    4.55 +/* Ends C function definitions when using C++ */
    4.56 +#ifdef __cplusplus
    4.57 +}
    4.58 +#endif
    4.59 +#include "close_code.h"
    4.60 +
    4.61 +#endif /* _SDL_cpuinfo_h */
     5.1 --- a/src/audio/SDL_mixer.c	Fri Nov 14 20:21:22 2003 +0000
     5.2 +++ b/src/audio/SDL_mixer.c	Tue Nov 18 01:27:06 2003 +0000
     5.3 @@ -34,28 +34,13 @@
     5.4  #include "SDL_audio.h"
     5.5  #include "SDL_mutex.h"
     5.6  #include "SDL_timer.h"
     5.7 +#include "SDL_cpuinfo.h"
     5.8  #include "SDL_sysaudio.h"
     5.9 +#include "SDL_cpuinfo.h"
    5.10  #include "SDL_mixer_MMX.h"
    5.11  #include "SDL_mixer_MMX_VC.h"
    5.12  #include "SDL_mixer_m68k.h"
    5.13  
    5.14 -/* Function to check the CPU flags */
    5.15 -#define MMX_CPU		0x800000
    5.16 -#ifdef USE_ASMBLIT
    5.17 -#define CPU_Flags()	Hermes_X86_CPU()
    5.18 -#else
    5.19 -#define CPU_Flags()	0L
    5.20 -#endif
    5.21 -
    5.22 -#ifdef USE_ASMBLIT
    5.23 -#define X86_ASSEMBLER
    5.24 -#define HermesConverterInterface	void
    5.25 -#define HermesClearInterface		void
    5.26 -#define STACKCALL
    5.27 -
    5.28 -#include "HeadX86.h"
    5.29 -#endif
    5.30 -
    5.31  /* This table is used to add two sound values together and pin
    5.32   * the value to avoid overflow.  (used with permission from ARDI)
    5.33   * Changed to use 0xFE instead of 0xFF for better sound quality.
    5.34 @@ -154,7 +139,7 @@
    5.35  
    5.36  		case AUDIO_S8: {
    5.37  #if defined(i386) && defined(__GNUC__) && defined(USE_ASMBLIT)
    5.38 -			if (CPU_Flags() & MMX_CPU)
    5.39 +			if (SDL_HasMMX())
    5.40  			{
    5.41  				SDL_MixAudio_MMX_S8((char*)dst,(char*)src,(unsigned int)len,(int)volume);
    5.42  			}
    5.43 @@ -201,7 +186,7 @@
    5.44  
    5.45  		case AUDIO_S16LSB: {
    5.46  #if defined(i386) && defined(__GNUC__) && defined(USE_ASMBLIT)
    5.47 -			if (CPU_Flags() & MMX_CPU)
    5.48 +			if (SDL_HasMMX())
    5.49  			{
    5.50  				SDL_MixAudio_MMX_S16((char*)dst,(char*)src,(unsigned int)len,(int)volume);
    5.51  			}
     6.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     6.2 +++ b/src/cpuinfo/COPYING.LIB	Tue Nov 18 01:27:06 2003 +0000
     6.3 @@ -0,0 +1,438 @@
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   6.295 +    specified materials from the same place.
   6.296 +
   6.297 +    d) Verify that the user has already received a copy of these
   6.298 +    materials or that you have already sent this user a copy.
   6.299 +
   6.300 +  For an executable, the required form of the "work that uses the
   6.301 +Library" must include any data and utility programs needed for
   6.302 +reproducing the executable from it.  However, as a special exception,
   6.303 +the source code distributed need not include anything that is normally
   6.304 +distributed (in either source or binary form) with the major
   6.305 +components (compiler, kernel, and so on) of the operating system on
   6.306 +which the executable runs, unless that component itself accompanies
   6.307 +the executable.
   6.308 +
   6.309 +  It may happen that this requirement contradicts the license
   6.310 +restrictions of other proprietary libraries that do not normally
   6.311 +accompany the operating system.  Such a contradiction means you cannot
   6.312 +use both them and the Library together in an executable that you
   6.313 +distribute.
   6.314 +
   6.315 +  7. You may place library facilities that are a work based on the
   6.316 +Library side-by-side in a single library together with other library
   6.317 +facilities not covered by this License, and distribute such a combined
   6.318 +library, provided that the separate distribution of the work based on
   6.319 +the Library and of the other library facilities is otherwise
   6.320 +permitted, and provided that you do these two things:
   6.321 +
   6.322 +    a) Accompany the combined library with a copy of the same work
   6.323 +    based on the Library, uncombined with any other library
   6.324 +    facilities.  This must be distributed under the terms of the
   6.325 +    Sections above.
   6.326 +
   6.327 +    b) Give prominent notice with the combined library of the fact
   6.328 +    that part of it is a work based on the Library, and explaining
   6.329 +    where to find the accompanying uncombined form of the same work.
   6.330 +
   6.331 +  8. You may not copy, modify, sublicense, link with, or distribute
   6.332 +the Library except as expressly provided under this License.  Any
   6.333 +attempt otherwise to copy, modify, sublicense, link with, or
   6.334 +distribute the Library is void, and will automatically terminate your
   6.335 +rights under this License.  However, parties who have received copies,
   6.336 +or rights, from you under this License will not have their licenses
   6.337 +terminated so long as such parties remain in full compliance.
   6.338 +
   6.339 +  9. You are not required to accept this License, since you have not
   6.340 +signed it.  However, nothing else grants you permission to modify or
   6.341 +distribute the Library or its derivative works.  These actions are
   6.342 +prohibited by law if you do not accept this License.  Therefore, by
   6.343 +modifying or distributing the Library (or any work based on the
   6.344 +Library), you indicate your acceptance of this License to do so, and
   6.345 +all its terms and conditions for copying, distributing or modifying
   6.346 +the Library or works based on it.
   6.347 +
   6.348 +  10. Each time you redistribute the Library (or any work based on the
   6.349 +Library), the recipient automatically receives a license from the
   6.350 +original licensor to copy, distribute, link with or modify the Library
   6.351 +subject to these terms and conditions.  You may not impose any further
   6.352 +restrictions on the recipients' exercise of the rights granted herein.
   6.353 +You are not responsible for enforcing compliance by third parties to
   6.354 +this License.
   6.355 +
   6.356 +  11. If, as a consequence of a court judgment or allegation of patent
   6.357 +infringement or for any other reason (not limited to patent issues),
   6.358 +conditions are imposed on you (whether by court order, agreement or
   6.359 +otherwise) that contradict the conditions of this License, they do not
   6.360 +excuse you from the conditions of this License.  If you cannot
   6.361 +distribute so as to satisfy simultaneously your obligations under this
   6.362 +License and any other pertinent obligations, then as a consequence you
   6.363 +may not distribute the Library at all.  For example, if a patent
   6.364 +license would not permit royalty-free redistribution of the Library by
   6.365 +all those who receive copies directly or indirectly through you, then
   6.366 +the only way you could satisfy both it and this License would be to
   6.367 +refrain entirely from distribution of the Library.
   6.368 +
   6.369 +If any portion of this section is held invalid or unenforceable under any
   6.370 +particular circumstance, the balance of the section is intended to apply,
   6.371 +and the section as a whole is intended to apply in other circumstances.
   6.372 +
   6.373 +It is not the purpose of this section to induce you to infringe any
   6.374 +patents or other property right claims or to contest validity of any
   6.375 +such claims; this section has the sole purpose of protecting the
   6.376 +integrity of the free software distribution system which is
   6.377 +implemented by public license practices.  Many people have made
   6.378 +generous contributions to the wide range of software distributed
   6.379 +through that system in reliance on consistent application of that
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   6.381 +to distribute software through any other system and a licensee cannot
   6.382 +impose that choice.
   6.383 +
   6.384 +This section is intended to make thoroughly clear what is believed to
   6.385 +be a consequence of the rest of this License.
   6.386 +
   6.387 +  12. If the distribution and/or use of the Library is restricted in
   6.388 +certain countries either by patents or by copyrighted interfaces, the
   6.389 +original copyright holder who places the Library under this License may add
   6.390 +an explicit geographical distribution limitation excluding those countries,
   6.391 +so that distribution is permitted only in or among countries not thus
   6.392 +excluded.  In such case, this License incorporates the limitation as if
   6.393 +written in the body of this License.
   6.394 +
   6.395 +  13. The Free Software Foundation may publish revised and/or new
   6.396 +versions of the Library General Public License from time to time.
   6.397 +Such new versions will be similar in spirit to the present version,
   6.398 +but may differ in detail to address new problems or concerns.
   6.399 +
   6.400 +Each version is given a distinguishing version number.  If the Library
   6.401 +specifies a version number of this License which applies to it and
   6.402 +"any later version", you have the option of following the terms and
   6.403 +conditions either of that version or of any later version published by
   6.404 +the Free Software Foundation.  If the Library does not specify a
   6.405 +license version number, you may choose any version ever published by
   6.406 +the Free Software Foundation.
   6.407 +
   6.408 +  14. If you wish to incorporate parts of the Library into other free
   6.409 +programs whose distribution conditions are incompatible with these,
   6.410 +write to the author to ask for permission.  For software which is
   6.411 +copyrighted by the Free Software Foundation, write to the Free
   6.412 +Software Foundation; we sometimes make exceptions for this.  Our
   6.413 +decision will be guided by the two goals of preserving the free status
   6.414 +of all derivatives of our free software and of promoting the sharing
   6.415 +and reuse of software generally.
   6.416 +
   6.417 +			    NO WARRANTY
   6.418 +
   6.419 +  15. BECAUSE THE LIBRARY IS LICENSED FREE OF CHARGE, THERE IS NO
   6.420 +WARRANTY FOR THE LIBRARY, TO THE EXTENT PERMITTED BY APPLICABLE LAW.
   6.421 +EXCEPT WHEN OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR
   6.422 +OTHER PARTIES PROVIDE THE LIBRARY "AS IS" WITHOUT WARRANTY OF ANY
   6.423 +KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE
   6.424 +IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
   6.425 +PURPOSE.  THE ENTIRE RISK AS TO THE QUALITY AND PERFORMANCE OF THE
   6.426 +LIBRARY IS WITH YOU.  SHOULD THE LIBRARY PROVE DEFECTIVE, YOU ASSUME
   6.427 +THE COST OF ALL NECESSARY SERVICING, REPAIR OR CORRECTION.
   6.428 +
   6.429 +  16. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN
   6.430 +WRITING WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY
   6.431 +AND/OR REDISTRIBUTE THE LIBRARY AS PERMITTED ABOVE, BE LIABLE TO YOU
   6.432 +FOR DAMAGES, INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR
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   6.436 +FAILURE OF THE LIBRARY TO OPERATE WITH ANY OTHER SOFTWARE), EVEN IF
   6.437 +SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
   6.438 +DAMAGES.
   6.439 +
   6.440 +		     END OF TERMS AND CONDITIONS
   6.441 +
     7.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     7.2 +++ b/src/cpuinfo/Makefile.am	Tue Nov 18 01:27:06 2003 +0000
     7.3 @@ -0,0 +1,34 @@
     7.4 +###########################################################################
     7.5 +#
     7.6 +# Some consistent rules for building asm files:
     7.7 +
     7.8 +STRIP_FPIC = sh $(top_srcdir)/strip_fPIC.sh
     7.9 +
    7.10 +SUFFIXES = .asm
    7.11 +
    7.12 +.asm.lo:
    7.13 +	$(LIBTOOL) --tag=CC --mode=compile $(STRIP_FPIC) $(NASM) -t -D __FLAT__ -D __NOU__ @NASMFLAGS@ $< -o $*.o
    7.14 +
    7.15 +###########################################################################
    7.16 +
    7.17 +# The cpuinfo library target
    7.18 +noinst_LTLIBRARIES = libcpuinfo.la
    7.19 +
    7.20 +if HAVE_NASM
    7.21 +ARCH_SRCS =			\
    7.22 +	gcpuinfo.c		\
    7.23 +	_cpuinfo.asm		\
    7.24 +	_pcihelp.asm
    7.25 +else
    7.26 +ARCH_SRCS =
    7.27 +endif
    7.28 +
    7.29 +COMMON_SRCS = 			\
    7.30 +	SDL_cpuinfo.c
    7.31 +
    7.32 +libcpuinfo_la_SOURCES = $(ARCH_SRCS) $(COMMON_SRCS)
    7.33 +
    7.34 +EXTRA_DIST =			\
    7.35 +	COPYING.LIB		\
    7.36 +	README
    7.37 +
     8.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     8.2 +++ b/src/cpuinfo/README	Tue Nov 18 01:27:06 2003 +0000
     8.3 @@ -0,0 +1,5 @@
     8.4 +This is a stripped down version of the portable CPU detection code included
     8.5 +in the SciTech SNAP Graphics SDK.  It is redistributed under the LGPL license,
     8.6 +which can be found in COPYING.LIB.
     8.7 +
     8.8 +You can visit SciTech Software Inc. at: http://www.scitechsoft.com/
     9.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     9.2 +++ b/src/cpuinfo/SDL_cpuinfo.c	Tue Nov 18 01:27:06 2003 +0000
     9.3 @@ -0,0 +1,96 @@
     9.4 +/*
     9.5 +    SDL - Simple DirectMedia Layer
     9.6 +    Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002  Sam Lantinga
     9.7 +
     9.8 +    This library is free software; you can redistribute it and/or
     9.9 +    modify it under the terms of the GNU Library General Public
    9.10 +    License as published by the Free Software Foundation; either
    9.11 +    version 2 of the License, or (at your option) any later version.
    9.12 +
    9.13 +    This library is distributed in the hope that it will be useful,
    9.14 +    but WITHOUT ANY WARRANTY; without even the implied warranty of
    9.15 +    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
    9.16 +    Library General Public License for more details.
    9.17 +
    9.18 +    You should have received a copy of the GNU Library General Public
    9.19 +    License along with this library; if not, write to the Free
    9.20 +    Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
    9.21 +
    9.22 +    Sam Lantinga
    9.23 +    slouken@libsdl.org
    9.24 +*/
    9.25 +
    9.26 +#ifdef SAVE_RCSID
    9.27 +static char rcsid =
    9.28 + "@(#) $Id$";
    9.29 +#endif
    9.30 +
    9.31 +/* CPU feature detection for SDL */
    9.32 +
    9.33 +#include "SDL.h"
    9.34 +//#include "SDL_cpuinfo.h"
    9.35 +
    9.36 +#define CPU_HAS_MMX	0x00000001
    9.37 +#define CPU_HAS_3DNOW	0x00000002
    9.38 +#define CPU_HAS_SSE	0x00000004
    9.39 +
    9.40 +/* These functions come from SciTech's PM library */
    9.41 +extern int CPU_haveMMX();
    9.42 +extern int CPU_have3DNow();
    9.43 +extern int CPU_haveSSE();
    9.44 +
    9.45 +static Uint32 SDL_CPUFeatures = 0xFFFFFFFF;
    9.46 +
    9.47 +static Uint32 SDL_GetCPUFeatures()
    9.48 +{
    9.49 +	if ( SDL_CPUFeatures == 0xFFFFFFFF ) {
    9.50 +		SDL_CPUFeatures = 0;
    9.51 +		if ( CPU_haveMMX() ) {
    9.52 +			SDL_CPUFeatures |= CPU_HAS_MMX;
    9.53 +		}
    9.54 +		if ( CPU_have3DNow() ) {
    9.55 +			SDL_CPUFeatures |= CPU_HAS_3DNOW;
    9.56 +		}
    9.57 +		if ( CPU_haveSSE() ) {
    9.58 +			SDL_CPUFeatures |= CPU_HAS_SSE;
    9.59 +		}
    9.60 +	}
    9.61 +	return SDL_CPUFeatures;
    9.62 +}
    9.63 +
    9.64 +SDL_bool SDL_HasMMX()
    9.65 +{
    9.66 +	if ( SDL_GetCPUFeatures() & CPU_HAS_MMX ) {
    9.67 +		return SDL_TRUE;
    9.68 +	}
    9.69 +	return SDL_FALSE;
    9.70 +}
    9.71 +
    9.72 +SDL_bool SDL_Has3DNow()
    9.73 +{
    9.74 +	if ( SDL_GetCPUFeatures() & CPU_HAS_3DNOW ) {
    9.75 +		return SDL_TRUE;
    9.76 +	}
    9.77 +	return SDL_FALSE;
    9.78 +}
    9.79 +
    9.80 +SDL_bool SDL_HasSSE()
    9.81 +{
    9.82 +	if ( SDL_GetCPUFeatures() & CPU_HAS_SSE ) {
    9.83 +		return SDL_TRUE;
    9.84 +	}
    9.85 +	return SDL_FALSE;
    9.86 +}
    9.87 +
    9.88 +#ifdef TEST_MAIN
    9.89 +
    9.90 +#include <stdio.h>
    9.91 +
    9.92 +int main()
    9.93 +{
    9.94 +	printf("MMX: %d\n", SDL_HasMMX());
    9.95 +	printf("3DNow: %d\n", SDL_Has3DNow());
    9.96 +	printf("SSE: %d\n", SDL_HasSSE());
    9.97 +}
    9.98 +
    9.99 +#endif /* TEST_MAIN */
    10.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    10.2 +++ b/src/cpuinfo/_cpuinfo.asm	Tue Nov 18 01:27:06 2003 +0000
    10.3 @@ -0,0 +1,611 @@
    10.4 +;****************************************************************************
    10.5 +;*
    10.6 +;*                  SciTech OS Portability Manager Library
    10.7 +;*
    10.8 +;*  ========================================================================
    10.9 +;*
   10.10 +;*   Copyright (C) 1991-2002 SciTech Software, Inc. All rights reserved.
   10.11 +;*
   10.12 +;*   This file may be distributed and/or modified under the terms of the
   10.13 +;*   GNU Lesser General Public License version 2.1 as published by the Free
   10.14 +;*   Software Foundation and appearing in the file LICENSE.LGPL included
   10.15 +;*   in the packaging of this file.
   10.16 +;*
   10.17 +;*   Licensees holding a valid Commercial License for this product from
   10.18 +;*   SciTech Software, Inc. may use this file in accordance with the
   10.19 +;*   Commercial License Agreement provided with the Software.
   10.20 +;*
   10.21 +;*   This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING
   10.22 +;*   THE WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
   10.23 +;*   PURPOSE.
   10.24 +;*
   10.25 +;*   See http://www.scitechsoft.com/license/ for information about
   10.26 +;*   the licensing options available and how to purchase a Commercial
   10.27 +;*   License Agreement.
   10.28 +;*
   10.29 +;*   Contact license@scitechsoft.com if any conditions of this licensing
   10.30 +;*   are not clear to you, or you have questions about licensing options.
   10.31 +;*
   10.32 +;*  ========================================================================
   10.33 +;*
   10.34 +;* Language:    NASM
   10.35 +;* Environment: Intel 32 bit Protected Mode.
   10.36 +;*
   10.37 +;* Description: Code to determine the Intel processor type.
   10.38 +;*
   10.39 +;****************************************************************************
   10.40 +
   10.41 +include "scitech.mac"
   10.42 +
   10.43 +header      _cpuinfo
   10.44 +
   10.45 +begdataseg  _cpuinfo                ; Start of data segment
   10.46 +
   10.47 +cache_id    db  "01234567890123456"
   10.48 +intel_id    db  "GenuineIntel"      ; Intel vendor ID
   10.49 +cyrix_id    db  "CyrixInstead"      ; Cyrix vendor ID
   10.50 +amd_id      db  "AuthenticAMD"      ; AMD vendor ID
   10.51 +idt_id      db  "CentaurHauls"      ; IDT vendor ID
   10.52 +
   10.53 +CPU_IDT     EQU 01000h              ; Flag for IDT processors
   10.54 +CPU_Cyrix   EQU 02000h              ; Flag for Cyrix processors
   10.55 +CPU_AMD     EQU 04000h              ; Flag for AMD processors
   10.56 +CPU_Intel   EQU 08000h              ; Flag for Intel processors
   10.57 +
   10.58 +enddataseg  _cpuinfo
   10.59 +
   10.60 +begcodeseg  _cpuinfo                ; Start of code segment
   10.61 +
   10.62 +%macro mCPU_ID 0
   10.63 +db  00Fh,0A2h
   10.64 +%endmacro
   10.65 +
   10.66 +%macro mRDTSC 0
   10.67 +db  00Fh,031h
   10.68 +%endmacro
   10.69 +
   10.70 +;----------------------------------------------------------------------------
   10.71 +; bool _CPU_check80386(void)
   10.72 +;----------------------------------------------------------------------------
   10.73 +; Determines if we have an i386 processor.
   10.74 +;----------------------------------------------------------------------------
   10.75 +cprocstart  _CPU_check80386
   10.76 +
   10.77 +        enter_c
   10.78 +
   10.79 +        xor     edx,edx             ; EDX = 0, not an 80386
   10.80 +        mov     bx, sp
   10.81 +        and     sp, ~3
   10.82 +        pushfd                      ; Push original EFLAGS
   10.83 +        pop     eax                 ; Get original EFLAGS
   10.84 +        mov     ecx, eax            ; Save original EFLAGS
   10.85 +        xor     eax, 40000h         ; Flip AC bit in EFLAGS
   10.86 +        push    eax                 ; Save new EFLAGS value on
   10.87 +                                    ;   stack
   10.88 +        popfd                       ; Replace current EFLAGS value
   10.89 +        pushfd                      ; Get new EFLAGS
   10.90 +        pop     eax                 ; Store new EFLAGS in EAX
   10.91 +        xor     eax, ecx            ; Can't toggle AC bit,
   10.92 +                                    ;   processor=80386
   10.93 +        jnz     @@Done              ; Jump if not an 80386 processor
   10.94 +        inc     edx                 ; We have an 80386
   10.95 +
   10.96 +@@Done: push    ecx
   10.97 +        popfd
   10.98 +        mov     sp, bx
   10.99 +        mov     eax, edx
  10.100 +        leave_c
  10.101 +        ret
  10.102 +
  10.103 +cprocend
  10.104 +
  10.105 +;----------------------------------------------------------------------------
  10.106 +; bool _CPU_check80486(void)
  10.107 +;----------------------------------------------------------------------------
  10.108 +; Determines if we have an i486 processor.
  10.109 +;----------------------------------------------------------------------------
  10.110 +cprocstart  _CPU_check80486
  10.111 +
  10.112 +        enter_c
  10.113 +
  10.114 +; Distinguish between the i486 and Pentium by the ability to set the ID flag
  10.115 +; in the EFLAGS register. If the ID flag is set, then we can use the CPUID
  10.116 +; instruction to determine the final version of the chip. Otherwise we
  10.117 +; simply have an 80486.
  10.118 +
  10.119 +; Distinguish between the i486 and Pentium by the ability to set the ID flag
  10.120 +; in the EFLAGS register. If the ID flag is set, then we can use the CPUID
  10.121 +; instruction to determine the final version of the chip. Otherwise we
  10.122 +; simply have an 80486.
  10.123 +
  10.124 +        pushfd                      ; Get original EFLAGS
  10.125 +        pop     eax
  10.126 +        mov     ecx, eax
  10.127 +        xor     eax, 200000h        ; Flip ID bit in EFLAGS
  10.128 +        push    eax                 ; Save new EFLAGS value on stack
  10.129 +        popfd                       ; Replace current EFLAGS value
  10.130 +        pushfd                      ; Get new EFLAGS
  10.131 +        pop     eax                 ; Store new EFLAGS in EAX
  10.132 +        xor     eax, ecx            ; Can not toggle ID bit,
  10.133 +        jnz     @@1                 ; Processor=80486
  10.134 +        mov     eax,1               ; We dont have a Pentium
  10.135 +        jmp     @@Done
  10.136 +@@1:    mov     eax,0               ; We have Pentium or later
  10.137 +@@Done: leave_c
  10.138 +        ret
  10.139 +
  10.140 +cprocend
  10.141 +
  10.142 +;----------------------------------------------------------------------------
  10.143 +; bool _CPU_checkClone(void)
  10.144 +;----------------------------------------------------------------------------
  10.145 +; Checks if the i386 or i486 processor is a clone or genuine Intel.
  10.146 +;----------------------------------------------------------------------------
  10.147 +cprocstart  _CPU_checkClone
  10.148 +
  10.149 +        enter_c
  10.150 +
  10.151 +        mov     ax,5555h            ; Check to make sure this is a 32-bit processor
  10.152 +        xor     dx,dx
  10.153 +        mov     cx,2h
  10.154 +        div     cx                  ; Perform Division
  10.155 +        clc
  10.156 +        jnz     @@NoClone
  10.157 +        jmp     @@Clone
  10.158 +@@NoClone:
  10.159 +        stc
  10.160 +@@Clone:
  10.161 +        pushfd
  10.162 +        pop     eax                 ; Get the flags
  10.163 +        and     eax,1
  10.164 +        xor     eax,1               ; EAX=0 is probably Intel, EAX=1 is a Clone
  10.165 +
  10.166 +        leave_c
  10.167 +        ret
  10.168 +
  10.169 +cprocend
  10.170 +
  10.171 +;----------------------------------------------------------------------------
  10.172 +; bool _CPU_haveCPUID(void)
  10.173 +;----------------------------------------------------------------------------
  10.174 +; Determines if we have support for the CPUID instruction.
  10.175 +;----------------------------------------------------------------------------
  10.176 +cprocstart  _CPU_haveCPUID
  10.177 +
  10.178 +        enter_c
  10.179 +
  10.180 +ifdef flatmodel
  10.181 +        pushfd                      ; Get original EFLAGS
  10.182 +        pop     eax
  10.183 +        mov     ecx, eax
  10.184 +        xor     eax, 200000h        ; Flip ID bit in EFLAGS
  10.185 +        push    eax                 ; Save new EFLAGS value on stack
  10.186 +        popfd                       ; Replace current EFLAGS value
  10.187 +        pushfd                      ; Get new EFLAGS
  10.188 +        pop     eax                 ; Store new EFLAGS in EAX
  10.189 +        xor     eax, ecx            ; Can not toggle ID bit,
  10.190 +        jnz     @@1                 ; Processor=80486
  10.191 +        mov     eax,0               ; We dont have CPUID support
  10.192 +        jmp     @@Done
  10.193 +@@1:    mov     eax,1               ; We have CPUID support
  10.194 +else
  10.195 +        mov     eax,0               ; CPUID requires 32-bit pmode
  10.196 +endif
  10.197 +@@Done: leave_c
  10.198 +        ret
  10.199 +
  10.200 +cprocend
  10.201 +
  10.202 +;----------------------------------------------------------------------------
  10.203 +; uint _CPU_checkCPUID(void)
  10.204 +;----------------------------------------------------------------------------
  10.205 +; Determines the CPU type using the CPUID instruction.
  10.206 +;----------------------------------------------------------------------------
  10.207 +cprocstart  _CPU_checkCPUID
  10.208 +
  10.209 +        enter_c
  10.210 +
  10.211 +        xor     eax, eax            ; Set up for CPUID instruction
  10.212 +        mCPU_ID                     ; Get and save vendor ID
  10.213 +        cmp     eax, 1              ; Make sure 1 is valid input for CPUID
  10.214 +        jl      @@Fail              ; We dont have the CPUID instruction
  10.215 +        xor     eax,eax             ; Assume vendor is unknown
  10.216 +
  10.217 +; Check for GenuineIntel processors
  10.218 +
  10.219 +        LEA_L   esi,intel_id
  10.220 +        cmp     [DWORD esi], ebx
  10.221 +        jne     @@NotIntel
  10.222 +        cmp     [DWORD esi+4], edx
  10.223 +        jne     @@NotIntel
  10.224 +        cmp     [DWORD esi+8], ecx
  10.225 +        jne     @@NotIntel
  10.226 +        mov     eax,CPU_Intel       ; Flag that we have GenuineIntel
  10.227 +        jmp     @@FoundVendor
  10.228 +
  10.229 +; Check for CyrixInstead processors
  10.230 +
  10.231 +@@NotIntel:
  10.232 +        LEA_L   esi,cyrix_id
  10.233 +        cmp     [DWORD esi], ebx
  10.234 +        jne     @@NotCyrix
  10.235 +        cmp     [DWORD esi+4], edx
  10.236 +        jne     @@NotCyrix
  10.237 +        cmp     [DWORD esi+8], ecx
  10.238 +        jne     @@NotCyrix
  10.239 +        mov     eax,CPU_Cyrix       ; Flag that we have CyrixInstead
  10.240 +        jmp     @@FoundVendor
  10.241 +
  10.242 +; Check for AuthenticAMD processors
  10.243 +
  10.244 +@@NotCyrix:
  10.245 +        LEA_L   esi,amd_id
  10.246 +        cmp     [DWORD esi], ebx
  10.247 +        jne     @@NotAMD
  10.248 +        cmp     [DWORD esi+4], edx
  10.249 +        jne     @@NotAMD
  10.250 +        cmp     [DWORD esi+8], ecx
  10.251 +        jne     @@NotAMD
  10.252 +        mov     eax,CPU_AMD         ; Flag that we have AuthenticAMD
  10.253 +        jmp     @@FoundVendor
  10.254 +
  10.255 +; Check for CentaurHauls processors
  10.256 +
  10.257 +@@NotAMD:
  10.258 +        LEA_L   esi,idt_id
  10.259 +        cmp     [DWORD esi], ebx
  10.260 +        jne     @@NotIDT
  10.261 +        cmp     [DWORD esi+4], edx
  10.262 +        jne     @@NotIDT
  10.263 +        cmp     [DWORD esi+8], ecx
  10.264 +        jne     @@NotIDT
  10.265 +        mov     eax,CPU_IDT         ; Flag that we have AuthenticIDT
  10.266 +        jmp     @@FoundVendor
  10.267 +
  10.268 +@@NotIDT:
  10.269 +
  10.270 +@@FoundVendor:
  10.271 +        push    eax
  10.272 +        xor     eax, eax
  10.273 +        inc     eax
  10.274 +        mCPU_ID                     ; Get family/model/stepping/features
  10.275 +        and     eax, 0F00h
  10.276 +        shr     eax, 8              ; Isolate CPU family
  10.277 +        and     eax, 0Fh
  10.278 +        cmp     eax, 0Fh            ; Check for Pentium 4 which is an 0Fh!
  10.279 +        jne     @@NotP4
  10.280 +        mov     eax, 07h            ; Change P4 ID to 7 for consistency
  10.281 +@@NotP4:
  10.282 +        pop     ecx
  10.283 +        or      eax,ecx             ; Combine in the CPU vendor flag
  10.284 +@@Done: leave_c
  10.285 +        ret
  10.286 +
  10.287 +@@Fail: xor     eax,eax
  10.288 +        jmp     @@Done
  10.289 +
  10.290 +cprocend
  10.291 +
  10.292 +;----------------------------------------------------------------------------
  10.293 +; uint _CPU_getCPUIDModel(void)
  10.294 +;----------------------------------------------------------------------------
  10.295 +; Determines the CPU type using the CPUID instruction.
  10.296 +;----------------------------------------------------------------------------
  10.297 +cprocstart  _CPU_getCPUIDModel
  10.298 +
  10.299 +        enter_c
  10.300 +
  10.301 +        xor     eax, eax            ; Set up for CPUID instruction
  10.302 +        mCPU_ID                     ; Get and save vendor ID
  10.303 +        cmp     eax, 1              ; Make sure 1 is valid input for CPUID
  10.304 +        jl      @@Fail              ; We dont have the CPUID instruction
  10.305 +        xor     eax, eax
  10.306 +        inc     eax
  10.307 +        mCPU_ID                     ; Get family/model/stepping/features
  10.308 +        and     eax, 0F0h
  10.309 +        shr     eax, 4              ; Isolate model
  10.310 +@@Done: leave_c
  10.311 +        ret
  10.312 +
  10.313 +@@Fail: xor     eax,eax
  10.314 +        jmp     @@Done
  10.315 +
  10.316 +cprocend
  10.317 +
  10.318 +;----------------------------------------------------------------------------
  10.319 +; uint _CPU_getCPUIDStepping(void)
  10.320 +;----------------------------------------------------------------------------
  10.321 +; Determines the CPU type using the CPUID instruction.
  10.322 +;----------------------------------------------------------------------------
  10.323 +cprocstart  _CPU_getCPUIDStepping
  10.324 +
  10.325 +        enter_c
  10.326 +
  10.327 +        xor     eax, eax            ; Set up for CPUID instruction
  10.328 +        mCPU_ID                     ; Get and save vendor ID
  10.329 +        cmp     eax, 1              ; Make sure 1 is valid input for CPUID
  10.330 +        jl      @@Fail              ; We dont have the CPUID instruction
  10.331 +        xor     eax, eax
  10.332 +        inc     eax
  10.333 +        mCPU_ID                     ; Get family/model/stepping/features
  10.334 +        and     eax, 00Fh           ; Isolate stepping
  10.335 +@@Done: leave_c
  10.336 +        ret
  10.337 +
  10.338 +@@Fail: xor     eax,eax
  10.339 +        jmp     @@Done
  10.340 +
  10.341 +cprocend
  10.342 +
  10.343 +;----------------------------------------------------------------------------
  10.344 +; uint _CPU_getCPUIDFeatures(void)
  10.345 +;----------------------------------------------------------------------------
  10.346 +; Determines the CPU type using the CPUID instruction.
  10.347 +;----------------------------------------------------------------------------
  10.348 +cprocstart  _CPU_getCPUIDFeatures
  10.349 +
  10.350 +        enter_c
  10.351 +
  10.352 +        xor     eax, eax            ; Set up for CPUID instruction
  10.353 +        mCPU_ID                     ; Get and save vendor ID
  10.354 +        cmp     eax, 1              ; Make sure 1 is valid input for CPUID
  10.355 +        jl      @@Fail              ; We dont have the CPUID instruction
  10.356 +        xor     eax, eax
  10.357 +        inc     eax
  10.358 +        mCPU_ID                     ; Get family/model/stepping/features
  10.359 +        mov     eax, edx
  10.360 +@@Done: leave_c
  10.361 +        ret
  10.362 +
  10.363 +@@Fail: xor     eax,eax
  10.364 +        jmp     @@Done
  10.365 +
  10.366 +cprocend
  10.367 +
  10.368 +;----------------------------------------------------------------------------
  10.369 +; uint _CPU_getCacheSize(void)
  10.370 +;----------------------------------------------------------------------------
  10.371 +; Determines the CPU cache size for Intel processors
  10.372 +;----------------------------------------------------------------------------
  10.373 +cprocstart  _CPU_getCacheSize
  10.374 +
  10.375 +        enter_c
  10.376 +        xor     eax, eax            ; Set up for CPUID instruction
  10.377 +        mCPU_ID                     ; Get and save vendor ID
  10.378 +        cmp     eax,2               ; Make sure 2 is valid input for CPUID
  10.379 +        jl      @@Fail              ; We dont have the CPUID instruction
  10.380 +        mov     eax,2
  10.381 +        mCPU_ID                     ; Get cache descriptors
  10.382 +        LEA_L   esi,cache_id        ; Get address of cache ID (-fPIC aware)
  10.383 +        shr     eax,8
  10.384 +        mov     [esi+0],eax
  10.385 +        mov     [esi+3],ebx
  10.386 +        mov     [esi+7],ecx
  10.387 +        mov     [esi+11],edx
  10.388 +        xor     eax,eax
  10.389 +        LEA_L   esi,cache_id        ; Get address of cache ID (-fPIC aware)
  10.390 +        mov     edi,15
  10.391 +@@ScanLoop:
  10.392 +        cmp     [BYTE esi],41h
  10.393 +        mov     eax,128
  10.394 +        je      @@Done
  10.395 +        cmp     [BYTE esi],42h
  10.396 +        mov     eax,256
  10.397 +        je      @@Done
  10.398 +        cmp     [BYTE esi],43h
  10.399 +        mov     eax,512
  10.400 +        je      @@Done
  10.401 +        cmp     [BYTE esi],44h
  10.402 +        mov     eax,1024
  10.403 +        je      @@Done
  10.404 +        cmp     [BYTE esi],45h
  10.405 +        mov     eax,2048
  10.406 +        je      @@Done
  10.407 +        inc     esi
  10.408 +        dec     edi
  10.409 +        jnz     @@ScanLoop
  10.410 +
  10.411 +@@Done: leave_c
  10.412 +        ret
  10.413 +
  10.414 +@@Fail: xor     eax,eax
  10.415 +        jmp     @@Done
  10.416 +
  10.417 +cprocend
  10.418 +
  10.419 +;----------------------------------------------------------------------------
  10.420 +; uint _CPU_have3DNow(void)
  10.421 +;----------------------------------------------------------------------------
  10.422 +; Determines the CPU type using the CPUID instruction.
  10.423 +;----------------------------------------------------------------------------
  10.424 +cprocstart  _CPU_have3DNow
  10.425 +
  10.426 +        enter_c
  10.427 +
  10.428 +        mov     eax,80000000h       ; Query for extended functions
  10.429 +        mCPU_ID                     ; Get extended function limit
  10.430 +        cmp     eax,80000001h
  10.431 +        jbe     @@Fail              ; Nope, we dont have function 800000001h
  10.432 +        mov     eax,80000001h       ; Setup extended function 800000001h
  10.433 +        mCPU_ID                     ; and get the information
  10.434 +        test    edx,80000000h       ; Bit 31 is set if 3DNow! present
  10.435 +        jz      @@Fail              ; Nope, we dont have 3DNow support
  10.436 +        mov     eax,1               ; Yep, we have 3DNow! support!
  10.437 +@@Done: leave_c
  10.438 +        ret
  10.439 +
  10.440 +@@Fail: xor     eax,eax
  10.441 +        jmp     @@Done
  10.442 +
  10.443 +cprocend
  10.444 +
  10.445 +;----------------------------------------------------------------------------
  10.446 +; ulong _CPU_quickRDTSC(void)
  10.447 +;----------------------------------------------------------------------------
  10.448 +; Reads the time stamp counter and returns the low order 32-bits
  10.449 +;----------------------------------------------------------------------------
  10.450 +cprocstart  _CPU_quickRDTSC
  10.451 +
  10.452 +        mRDTSC
  10.453 +        ret
  10.454 +
  10.455 +cprocend
  10.456 +
  10.457 +;----------------------------------------------------------------------------
  10.458 +; void _CPU_runBSFLoop(ulong interations)
  10.459 +;----------------------------------------------------------------------------
  10.460 +; Runs a loop of BSF instructions for the specified number of iterations
  10.461 +;----------------------------------------------------------------------------
  10.462 +cprocstart  _CPU_runBSFLoop
  10.463 +
  10.464 +        ARG     iterations:ULONG
  10.465 +
  10.466 +        push    _bp
  10.467 +        mov     _bp,_sp
  10.468 +        push    _bx
  10.469 +
  10.470 +        mov     edx,[iterations]
  10.471 +        mov     eax,80000000h
  10.472 +        mov     ebx,edx
  10.473 +
  10.474 +        ALIGN   4
  10.475 +
  10.476 +@@loop: bsf     ecx,eax
  10.477 +        dec     ebx
  10.478 +        jnz     @@loop
  10.479 +
  10.480 +        pop     _bx
  10.481 +        pop     _bp
  10.482 +        ret
  10.483 +
  10.484 +cprocend
  10.485 +
  10.486 +;----------------------------------------------------------------------------
  10.487 +; void  _CPU_readTimeStamp(CPU_largeInteger *time);
  10.488 +;----------------------------------------------------------------------------
  10.489 +; Reads the time stamp counter and returns the 64-bit result.
  10.490 +;----------------------------------------------------------------------------
  10.491 +cprocstart  _CPU_readTimeStamp
  10.492 +
  10.493 +        mRDTSC
  10.494 +        mov     ecx,[esp+4]     ; Access directly without stack frame
  10.495 +        mov     [ecx],eax
  10.496 +        mov     [ecx+4],edx
  10.497 +        ret
  10.498 +
  10.499 +cprocend
  10.500 +
  10.501 +;----------------------------------------------------------------------------
  10.502 +; ulong _CPU_diffTime64(CPU_largeInteger *t1,CPU_largeInteger *t2,CPU_largeInteger *t)
  10.503 +;----------------------------------------------------------------------------
  10.504 +; Computes the difference between two 64-bit numbers.
  10.505 +;----------------------------------------------------------------------------
  10.506 +cprocstart  _CPU_diffTime64
  10.507 +
  10.508 +        ARG     t1:DPTR, t2:DPTR, t:DPTR
  10.509 +
  10.510 +        enter_c
  10.511 +
  10.512 +        mov     ecx,[t2]
  10.513 +        mov     eax,[ecx]       ; EAX := t2.low
  10.514 +        mov     ecx,[t1]
  10.515 +        sub     eax,[ecx]
  10.516 +        mov     edx,eax         ; EDX := low difference
  10.517 +        mov     ecx,[t2]
  10.518 +        mov     eax,[ecx+4]     ; ECX := t2.high
  10.519 +        mov     ecx,[t1]
  10.520 +        sbb     eax,[ecx+4]     ; EAX := high difference
  10.521 +
  10.522 +        mov     ebx,[t]         ; Store the result
  10.523 +        mov     [ebx],edx       ; Store low part
  10.524 +        mov     [ebx+4],eax     ; Store high part
  10.525 +        mov     eax,edx         ; Return low part
  10.526 +ifndef flatmodel
  10.527 +        shld    edx,eax,16      ; Return in DX:AX
  10.528 +endif
  10.529 +        leave_c
  10.530 +        ret
  10.531 +
  10.532 +cprocend
  10.533 +
  10.534 +;----------------------------------------------------------------------------
  10.535 +; ulong _CPU_calcMicroSec(CPU_largeInteger *count,ulong freq);
  10.536 +;----------------------------------------------------------------------------
  10.537 +; Computes the value in microseconds for the elapsed time with maximum
  10.538 +; precision. The formula we use is:
  10.539 +;
  10.540 +;   us = (((diff * 0x100000) / freq) * 1000000) / 0x100000)
  10.541 +;
  10.542 +; The power of two multiple before the first divide allows us to scale the
  10.543 +; 64-bit difference using simple shifts, and then the divide brings the
  10.544 +; final result into the range to fit into a 32-bit integer.
  10.545 +;----------------------------------------------------------------------------
  10.546 +cprocstart  _CPU_calcMicroSec
  10.547 +
  10.548 +        ARG     count:DPTR, freq:ULONG
  10.549 +
  10.550 +        enter_c
  10.551 +
  10.552 +        mov     ecx,[count]
  10.553 +        mov     eax,[ecx]       ; EAX := low part
  10.554 +        mov     edx,[ecx+4]     ; EDX := high part
  10.555 +        shld    edx,eax,20
  10.556 +        shl     eax,20          ; diff * 0x100000
  10.557 +        div     [DWORD freq]    ; (diff * 0x100000) / freq
  10.558 +        mov     ecx,1000000
  10.559 +        xor     edx,edx
  10.560 +        mul     ecx             ; ((diff * 0x100000) / freq) * 1000000)
  10.561 +        shrd    eax,edx,20      ; ((diff * 0x100000) / freq) * 1000000) / 0x100000
  10.562 +ifndef flatmodel
  10.563 +        shld    edx,eax,16      ; Return in DX:AX
  10.564 +endif
  10.565 +        leave_c
  10.566 +        ret
  10.567 +
  10.568 +cprocend
  10.569 +
  10.570 +;----------------------------------------------------------------------------
  10.571 +; ulong _CPU_mulDiv(ulong a,ulong b,ulong c);
  10.572 +;----------------------------------------------------------------------------
  10.573 +; Computes the following with 64-bit integer precision:
  10.574 +;
  10.575 +;   result = (a * b) / c
  10.576 +;
  10.577 +;----------------------------------------------------------------------------
  10.578 +cprocstart  _CPU_mulDiv
  10.579 +
  10.580 +        ARG     a:ULONG, b:ULONG, c:ULONG
  10.581 +
  10.582 +        enter_c
  10.583 +        mov     eax,[a]
  10.584 +        imul    [ULONG b]
  10.585 +        idiv    [ULONG c]
  10.586 +ifndef flatmodel
  10.587 +        shld    edx,eax,16      ; Return in DX:AX
  10.588 +endif
  10.589 +        leave_c
  10.590 +        ret
  10.591 +
  10.592 +cprocend
  10.593 +
  10.594 +;----------------------------------------------------------------------------
  10.595 +; int PM_getIOPL(void)
  10.596 +;----------------------------------------------------------------------------
  10.597 +; Returns current IOPL, callable from any ring, any OS, any day of the week
  10.598 +; (as long as it's 386 compatible). Sort of CPU information too.
  10.599 +;----------------------------------------------------------------------------
  10.600 +cprocstart  PM_getIOPL
  10.601 +
  10.602 +        pushfd
  10.603 +        pop     eax
  10.604 +        and     eax,0011000000000000b
  10.605 +        shr     eax,12
  10.606 +        ret
  10.607 +
  10.608 +cprocend
  10.609 +
  10.610 +
  10.611 +endcodeseg  _cpuinfo
  10.612 +
  10.613 +        END
  10.614 +
    11.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    11.2 +++ b/src/cpuinfo/_pcihelp.asm	Tue Nov 18 01:27:06 2003 +0000
    11.3 @@ -0,0 +1,339 @@
    11.4 +;****************************************************************************
    11.5 +;*
    11.6 +;*                  SciTech OS Portability Manager Library
    11.7 +;*
    11.8 +;*  ========================================================================
    11.9 +;*
   11.10 +;*   Copyright (C) 1991-2002 SciTech Software, Inc. All rights reserved.
   11.11 +;*
   11.12 +;*   This file may be distributed and/or modified under the terms of the
   11.13 +;*   GNU Lesser General Public License version 2.1 as published by the Free
   11.14 +;*   Software Foundation and appearing in the file LICENSE.LGPL included
   11.15 +;*   in the packaging of this file.
   11.16 +;*
   11.17 +;*   Licensees holding a valid Commercial License for this product from
   11.18 +;*   SciTech Software, Inc. may use this file in accordance with the
   11.19 +;*   Commercial License Agreement provided with the Software.
   11.20 +;*
   11.21 +;*   This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING
   11.22 +;*   THE WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
   11.23 +;*   PURPOSE.
   11.24 +;*
   11.25 +;*   See http://www.scitechsoft.com/license/ for information about
   11.26 +;*   the licensing options available and how to purchase a Commercial
   11.27 +;*   License Agreement.
   11.28 +;*
   11.29 +;*   Contact license@scitechsoft.com if any conditions of this licensing
   11.30 +;*   are not clear to you, or you have questions about licensing options.
   11.31 +;*
   11.32 +;*  ========================================================================
   11.33 +;*
   11.34 +;* Language:    NASM
   11.35 +;* Environment: Any
   11.36 +;*
   11.37 +;* Description: Helper assembler functions for PCI access module.
   11.38 +;*
   11.39 +;****************************************************************************
   11.40 +
   11.41 +include "scitech.mac"           ; Memory model macros
   11.42 +
   11.43 +header  _pcilib
   11.44 +
   11.45 +begcodeseg  _pcilib
   11.46 +
   11.47 +ifdef flatmodel
   11.48 +
   11.49 +;----------------------------------------------------------------------------
   11.50 +; uchar _ASMAPI _BIOS32_service(
   11.51 +;   ulong service,
   11.52 +;   ulong func,
   11.53 +;   ulong *physBase,
   11.54 +;   ulong *length,
   11.55 +;   ulong *serviceOffset,
   11.56 +;   PCIBIOS_entry entry);
   11.57 +;----------------------------------------------------------------------------
   11.58 +; Call the BIOS32 services directory
   11.59 +;----------------------------------------------------------------------------
   11.60 +cprocstart   _BIOS32_service
   11.61 +
   11.62 +        ARG     service:ULONG, func:ULONG, physBase:DPTR, len:DPTR, off:DPTR, entry:QWORD
   11.63 +
   11.64 +        enter_c
   11.65 +        mov     eax,[service]
   11.66 +        mov     ebx,[func]
   11.67 +        call    far dword [entry]
   11.68 +        mov     esi,[physBase]
   11.69 +        mov     [esi],ebx
   11.70 +        mov     esi,[len]
   11.71 +        mov     [esi],ecx
   11.72 +        mov     esi,[off]
   11.73 +        mov     [esi],edx
   11.74 +        leave_c
   11.75 +        ret
   11.76 +
   11.77 +cprocend
   11.78 +
   11.79 +endif
   11.80 +
   11.81 +;----------------------------------------------------------------------------
   11.82 +; ushort _ASMAPI _PCIBIOS_isPresent(ulong i_eax,ulong *o_edx,ushort *oeax,
   11.83 +;   uchar *o_cl,PCIBIOS_entry entry)
   11.84 +;----------------------------------------------------------------------------
   11.85 +; Call the PCI BIOS to determine if it is present.
   11.86 +;----------------------------------------------------------------------------
   11.87 +cprocstart   _PCIBIOS_isPresent
   11.88 +
   11.89 +        ARG     i_eax:ULONG, o_edx:DPTR, oeax:DPTR, o_cl:DPTR, entry:QWORD
   11.90 +
   11.91 +        enter_c
   11.92 +        mov     eax,[i_eax]
   11.93 +ifdef   flatmodel
   11.94 +        call    far dword [entry]
   11.95 +else
   11.96 +        int     1Ah
   11.97 +endif
   11.98 +        _les    _si,[o_edx]
   11.99 +        mov     [_ES _si],edx
  11.100 +        _les    _si,[oeax]
  11.101 +        mov     [_ES _si],ax
  11.102 +        _les    _si,[o_cl]
  11.103 +        mov     [_ES _si],cl
  11.104 +        mov     ax,bx
  11.105 +        leave_c
  11.106 +        ret
  11.107 +
  11.108 +cprocend
  11.109 +
  11.110 +;----------------------------------------------------------------------------
  11.111 +; ulong _PCIBIOS_service(ulong r_eax,ulong r_ebx,ulong r_edi,ulong r_ecx,
  11.112 +;   PCIBIOS_entry entry)
  11.113 +;----------------------------------------------------------------------------
  11.114 +; Call the PCI BIOS services, either via the 32-bit protected mode entry
  11.115 +; point or via the Int 1Ah 16-bit interrupt.
  11.116 +;----------------------------------------------------------------------------
  11.117 +cprocstart   _PCIBIOS_service
  11.118 +
  11.119 +        ARG     r_eax:ULONG, r_ebx:ULONG, r_edi:ULONG, r_ecx:ULONG, entry:QWORD
  11.120 +
  11.121 +        enter_c
  11.122 +        mov     eax,[r_eax]
  11.123 +        mov     ebx,[r_ebx]
  11.124 +        mov     edi,[r_edi]
  11.125 +        mov     ecx,[r_ecx]
  11.126 +ifdef   flatmodel
  11.127 +        call    far dword [entry]
  11.128 +else
  11.129 +        int     1Ah
  11.130 +endif
  11.131 +        mov     eax,ecx
  11.132 +ifndef  flatmodel
  11.133 +        shld    edx,eax,16      ; Return result in DX:AX
  11.134 +endif
  11.135 +        leave_c
  11.136 +        ret
  11.137 +
  11.138 +cprocend
  11.139 +
  11.140 +;----------------------------------------------------------------------------
  11.141 +; int _PCIBIOS_getRouting(PCIRoutingOptionsBuffer *buf,PCIBIOS_entry entry);
  11.142 +;----------------------------------------------------------------------------
  11.143 +; Get the routing options for PCI devices
  11.144 +;----------------------------------------------------------------------------
  11.145 +cprocstart   _PCIBIOS_getRouting
  11.146 +
  11.147 +        ARG     buf:DPTR, entry:QWORD
  11.148 +
  11.149 +        enter_c
  11.150 +        mov     eax,0B10Eh
  11.151 +        mov     bx,0
  11.152 +        _les    _di,[buf]
  11.153 +ifdef   flatmodel
  11.154 +        call    far dword [entry]
  11.155 +else
  11.156 +        int     1Ah
  11.157 +endif
  11.158 +        movzx   eax,ah
  11.159 +        leave_c
  11.160 +        ret
  11.161 +
  11.162 +cprocend
  11.163 +
  11.164 +;----------------------------------------------------------------------------
  11.165 +; ibool _PCIBIOS_setIRQ(int busDev,int intPin,int IRQ,PCIBIOS_entry entry);
  11.166 +;----------------------------------------------------------------------------
  11.167 +; Change the IRQ routing for the PCI device
  11.168 +;----------------------------------------------------------------------------
  11.169 +cprocstart   _PCIBIOS_setIRQ
  11.170 +
  11.171 +        ARG     busDev:UINT, intPin:UINT, IRQ:UINT, entry:QWORD
  11.172 +
  11.173 +        enter_c
  11.174 +        mov     eax,0B10Fh
  11.175 +        mov     bx,[USHORT busDev]
  11.176 +        mov     cl,[BYTE intPin]
  11.177 +        mov     ch,[BYTE IRQ]
  11.178 +ifdef   flatmodel
  11.179 +        call    far dword [entry]
  11.180 +else
  11.181 +        int     1Ah
  11.182 +endif
  11.183 +        mov     eax,1
  11.184 +        jnc     @@1
  11.185 +        xor     eax,eax         ; Function failed!
  11.186 +@@1:    leave_c
  11.187 +        ret
  11.188 +
  11.189 +cprocend
  11.190 +
  11.191 +;----------------------------------------------------------------------------
  11.192 +; ulong _PCIBIOS_specialCycle(int bus,ulong data,PCIBIOS_entry entry);
  11.193 +;----------------------------------------------------------------------------
  11.194 +; Generate a special cycle via the PCI BIOS.
  11.195 +;----------------------------------------------------------------------------
  11.196 +cprocstart   _PCIBIOS_specialCycle
  11.197 +
  11.198 +        ARG     bus:UINT, data:ULONG, entry:QWORD
  11.199 +
  11.200 +        enter_c
  11.201 +        mov     eax,0B106h
  11.202 +        mov     bh,[BYTE bus]
  11.203 +        mov     ecx,[data]
  11.204 +ifdef   flatmodel
  11.205 +        call    far dword [entry]
  11.206 +else
  11.207 +        int     1Ah
  11.208 +endif
  11.209 +        leave_c
  11.210 +        ret
  11.211 +
  11.212 +cprocend
  11.213 +
  11.214 +;----------------------------------------------------------------------------
  11.215 +; ushort _PCI_getCS(void)
  11.216 +;----------------------------------------------------------------------------
  11.217 +cprocstart   _PCI_getCS
  11.218 +
  11.219 +        mov     ax,cs
  11.220 +        ret
  11.221 +
  11.222 +cprocend
  11.223 +
  11.224 +;----------------------------------------------------------------------------
  11.225 +; int PM_inpb(int port)
  11.226 +;----------------------------------------------------------------------------
  11.227 +; Reads a byte from the specified port
  11.228 +;----------------------------------------------------------------------------
  11.229 +cprocstart  PM_inpb
  11.230 +
  11.231 +        ARG     port:UINT
  11.232 +
  11.233 +        push    _bp
  11.234 +        mov     _bp,_sp
  11.235 +        xor     _ax,_ax
  11.236 +        mov     _dx,[port]
  11.237 +        in      al,dx
  11.238 +        pop     _bp
  11.239 +        ret
  11.240 +
  11.241 +cprocend
  11.242 +
  11.243 +;----------------------------------------------------------------------------
  11.244 +; int PM_inpw(int port)
  11.245 +;----------------------------------------------------------------------------
  11.246 +; Reads a word from the specified port
  11.247 +;----------------------------------------------------------------------------
  11.248 +cprocstart  PM_inpw
  11.249 +
  11.250 +        ARG     port:UINT
  11.251 +
  11.252 +        push    _bp
  11.253 +        mov     _bp,_sp
  11.254 +        xor     _ax,_ax
  11.255 +        mov     _dx,[port]
  11.256 +        in      ax,dx
  11.257 +        pop     _bp
  11.258 +        ret
  11.259 +
  11.260 +cprocend
  11.261 +
  11.262 +;----------------------------------------------------------------------------
  11.263 +; ulong PM_inpd(int port)
  11.264 +;----------------------------------------------------------------------------
  11.265 +; Reads a word from the specified port
  11.266 +;----------------------------------------------------------------------------
  11.267 +cprocstart  PM_inpd
  11.268 +
  11.269 +        ARG     port:UINT
  11.270 +
  11.271 +        push    _bp
  11.272 +        mov     _bp,_sp
  11.273 +        mov     _dx,[port]
  11.274 +        in      eax,dx
  11.275 +ifndef flatmodel
  11.276 +        shld    edx,eax,16      ; DX:AX = result
  11.277 +endif
  11.278 +        pop     _bp
  11.279 +        ret
  11.280 +
  11.281 +cprocend
  11.282 +
  11.283 +;----------------------------------------------------------------------------
  11.284 +; void PM_outpb(int port,int value)
  11.285 +;----------------------------------------------------------------------------
  11.286 +; Write a byte to the specified port.
  11.287 +;----------------------------------------------------------------------------
  11.288 +cprocstart  PM_outpb
  11.289 +
  11.290 +        ARG     port:UINT, value:UINT
  11.291 +
  11.292 +        push    _bp
  11.293 +        mov     _bp,_sp
  11.294 +        mov     _dx,[port]
  11.295 +        mov     _ax,[value]
  11.296 +        out     dx,al
  11.297 +        pop     _bp
  11.298 +        ret
  11.299 +
  11.300 +cprocend
  11.301 +
  11.302 +;----------------------------------------------------------------------------
  11.303 +; void PM_outpw(int port,int value)
  11.304 +;----------------------------------------------------------------------------
  11.305 +; Write a word to the specified port.
  11.306 +;----------------------------------------------------------------------------
  11.307 +cprocstart  PM_outpw
  11.308 +
  11.309 +        ARG     port:UINT, value:UINT
  11.310 +
  11.311 +        push    _bp
  11.312 +        mov     _bp,_sp
  11.313 +        mov     _dx,[port]
  11.314 +        mov     _ax,[value]
  11.315 +        out     dx,ax
  11.316 +        pop     _bp
  11.317 +        ret
  11.318 +
  11.319 +cprocend
  11.320 +
  11.321 +;----------------------------------------------------------------------------
  11.322 +; void PM_outpd(int port,ulong value)
  11.323 +;----------------------------------------------------------------------------
  11.324 +; Write a word to the specified port.
  11.325 +;----------------------------------------------------------------------------
  11.326 +cprocstart  PM_outpd
  11.327 +
  11.328 +        ARG     port:UINT, value:ULONG
  11.329 +
  11.330 +        push    _bp
  11.331 +        mov     _bp,_sp
  11.332 +        mov     _dx,[port]
  11.333 +        mov     eax,[value]
  11.334 +        out     dx,eax
  11.335 +        pop     _bp
  11.336 +        ret
  11.337 +
  11.338 +cprocend
  11.339 +
  11.340 +endcodeseg  _pcilib
  11.341 +
  11.342 +        END
    12.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    12.2 +++ b/src/cpuinfo/cpuinfo.h	Tue Nov 18 01:27:06 2003 +0000
    12.3 @@ -0,0 +1,203 @@
    12.4 +/****************************************************************************
    12.5 +*
    12.6 +*                   SciTech OS Portability Manager Library
    12.7 +*
    12.8 +*  ========================================================================
    12.9 +*
   12.10 +*   Copyright (C) 1991-2002 SciTech Software, Inc. All rights reserved.
   12.11 +*
   12.12 +*   This file may be distributed and/or modified under the terms of the
   12.13 +*   GNU Lesser General Public License version 2.1 as published by the Free
   12.14 +*   Software Foundation and appearing in the file LICENSE.LGPL included
   12.15 +*   in the packaging of this file.
   12.16 +*
   12.17 +*   Licensees holding a valid Commercial License for this product from
   12.18 +*   SciTech Software, Inc. may use this file in accordance with the
   12.19 +*   Commercial License Agreement provided with the Software.
   12.20 +*
   12.21 +*   This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING
   12.22 +*   THE WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
   12.23 +*   PURPOSE.
   12.24 +*
   12.25 +*   See http://www.scitechsoft.com/license/ for information about
   12.26 +*   the licensing options available and how to purchase a Commercial
   12.27 +*   License Agreement.
   12.28 +*
   12.29 +*   Contact license@scitechsoft.com if any conditions of this licensing
   12.30 +*   are not clear to you, or you have questions about licensing options.
   12.31 +*
   12.32 +*  ========================================================================
   12.33 +*
   12.34 +* Language:     ANSI C
   12.35 +* Environment:  Any
   12.36 +*
   12.37 +* Description:  Header file for PM library functions for querying the CPU
   12.38 +*               type, CPU speed and CPU features. Includes support for
   12.39 +*               high precision timing on Pentium based systems using the
   12.40 +*               Read Time Stamp Counter.
   12.41 +*
   12.42 +****************************************************************************/
   12.43 +
   12.44 +#ifndef __CPUINFO_H
   12.45 +#define __CPUINFO_H
   12.46 +
   12.47 +//#include "scitech.h"
   12.48 +#include "SDL.h"
   12.49 +#ifdef USE_ASMBLIT
   12.50 +#define __INTEL__
   12.51 +#endif
   12.52 +typedef enum {
   12.53 +	false,
   12.54 +	true
   12.55 +} ibool;
   12.56 +typedef Uint8 uchar;
   12.57 +typedef Uint16 ushort;
   12.58 +typedef Uint32 uint;
   12.59 +typedef Uint32 ulong;
   12.60 +typedef Uint64 u64;
   12.61 +#define _ASMAPI SDLCALL
   12.62 +
   12.63 +/*--------------------- Macros and type definitions -----------------------*/
   12.64 +
   12.65 +/* Define the calling conventions - C always */
   12.66 +
   12.67 +#define ZAPI    _ASMAPI
   12.68 +
   12.69 +/****************************************************************************
   12.70 +REMARKS:
   12.71 +Defines the types of processors returned by CPU_getProcessorType.
   12.72 +
   12.73 +HEADER:
   12.74 +cpuinfo.h
   12.75 +
   12.76 +MEMBERS:
   12.77 +CPU_i386            - Intel 80386 processor
   12.78 +CPU_i486            - Intel 80486 processor
   12.79 +CPU_Pentium         - Intel Pentium(R) processor
   12.80 +CPU_PentiumPro      - Intel PentiumPro(R) processor
   12.81 +CPU_PentiumII       - Intel PentiumII(R) processor
   12.82 +CPU_Celeron         - Intel Celeron(R) processor
   12.83 +CPU_PentiumIII      - Intel PentiumIII(R) processor
   12.84 +CPU_Pentium4        - Intel Pentium4(R) processor
   12.85 +CPU_UnkIntel        - Unknown Intel processor
   12.86 +CPU_Cyrix6x86       - Cyrix 6x86 processor
   12.87 +CPU_Cyrix6x86MX     - Cyrix 6x86MX processor
   12.88 +CPU_CyrixMediaGX    - Cyrix MediaGX processor
   12.89 +CPU_CyrixMediaGXm   - Cyrix MediaGXm processor
   12.90 +CPU_UnkCyrix        - Unknown Cyrix processor
   12.91 +CPU_AMDAm486        - AMD Am486 processor
   12.92 +CPU_AMDAm5x86       - AMD Am5x86 processor
   12.93 +CPU_AMDK5           - AMD K5 processor
   12.94 +CPU_AMDK6           - AMD K6 processor
   12.95 +CPU_AMDK6_2         - AMD K6-2 processor
   12.96 +CPU_AMDK6_2plus     - AMD K6-2+ processor
   12.97 +CPU_AMDK6_III       - AMD K6-III processor
   12.98 +CPU_AMDK6_IIIplus   - AMD K6-III+ processor
   12.99 +CPU_AMDAthlon       - AMD Athlon processor
  12.100 +CPU_AMDDuron        - AMD Duron processor
  12.101 +CPU_UnkAMD          - Unknown AMD processor
  12.102 +CPU_WinChipC6       - IDT WinChip C6 processor
  12.103 +CPU_WinChip2        - IDT WinChip 2 processor
  12.104 +CPU_UnkIDT          - Unknown IDT processor
  12.105 +CPU_ViaCyrixIII     - Via Cyrix III
  12.106 +CPU_UnkVIA          - Unknown Via processor
  12.107 +CPU_Alpha           - DEC Alpha processor
  12.108 +CPU_Mips            - MIPS processor
  12.109 +CPU_PowerPC         - PowerPC processor
  12.110 +CPU_mask            - Mask to remove flags and get CPU type
  12.111 +CPU_IDT             - This bit is set if the processor vendor is IDT
  12.112 +CPU_Cyrix           - This bit is set if the processor vendor is Cyrix
  12.113 +CPU_AMD             - This bit is set if the processor vendor is AMD
  12.114 +CPU_Intel           - This bit is set if the processor vendor is Intel
  12.115 +CPU_VIA             - This bit is set if the processor vendor is Via
  12.116 +CPU_familyMask      - Mask to isolate CPU family
  12.117 +CPU_steppingMask    - Mask to isolate CPU stepping
  12.118 +CPU_steppingShift   - Shift factor for CPU stepping
  12.119 +****************************************************************************/
  12.120 +typedef enum {
  12.121 +    CPU_i386            = 0,
  12.122 +    CPU_i486            = 1,
  12.123 +    CPU_Pentium         = 2,
  12.124 +    CPU_PentiumPro      = 3,
  12.125 +    CPU_PentiumII       = 4,
  12.126 +    CPU_Celeron         = 5,
  12.127 +    CPU_PentiumIII      = 6,
  12.128 +    CPU_Pentium4        = 7,
  12.129 +    CPU_UnkIntel        = 8,
  12.130 +    CPU_Cyrix6x86       = 100,
  12.131 +    CPU_Cyrix6x86MX     = 101,
  12.132 +    CPU_CyrixMediaGX    = 102,
  12.133 +    CPU_CyrixMediaGXm   = 104,
  12.134 +    CPU_UnkCyrix        = 105,
  12.135 +    CPU_AMDAm486        = 200,
  12.136 +    CPU_AMDAm5x86       = 201,
  12.137 +    CPU_AMDK5           = 202,
  12.138 +    CPU_AMDK6           = 203,
  12.139 +    CPU_AMDK6_2         = 204,
  12.140 +    CPU_AMDK6_2plus     = 205,
  12.141 +    CPU_AMDK6_III       = 206,
  12.142 +    CPU_AMDK6_IIIplus   = 207,
  12.143 +    CPU_UnkAMD          = 208,
  12.144 +    CPU_AMDAthlon       = 250,
  12.145 +    CPU_AMDDuron        = 251,
  12.146 +    CPU_WinChipC6       = 300,
  12.147 +    CPU_WinChip2        = 301,
  12.148 +    CPU_UnkIDT          = 302,
  12.149 +    CPU_ViaCyrixIII     = 400,
  12.150 +    CPU_UnkVIA          = 401,
  12.151 +    CPU_Alpha           = 500,
  12.152 +    CPU_Mips            = 600,
  12.153 +    CPU_PowerPC         = 700,
  12.154 +    CPU_mask            = 0x00000FFF,
  12.155 +    CPU_IDT             = 0x00001000,
  12.156 +    CPU_Cyrix           = 0x00002000,
  12.157 +    CPU_AMD             = 0x00004000,
  12.158 +    CPU_Intel           = 0x00008000,
  12.159 +    CPU_VIA             = 0x00010000,
  12.160 +    CPU_familyMask      = 0x00FFF000,
  12.161 +    CPU_steppingMask    = 0x0F000000,
  12.162 +    CPU_steppingShift   = 24
  12.163 +    } CPU_processorType;
  12.164 +
  12.165 +#pragma pack(1)
  12.166 +/****************************************************************************
  12.167 +REMARKS:
  12.168 +Defines the structure for holding 64-bit integers used for storing the values
  12.169 +returned by the Intel RDTSC instruction.
  12.170 +
  12.171 +HEADER:
  12.172 +cpuinfo.h
  12.173 +
  12.174 +MEMBERS:
  12.175 +low     - Low 32-bits of the 64-bit integer
  12.176 +high    - High 32-bits of the 64-bit integer
  12.177 +****************************************************************************/
  12.178 +typedef struct {
  12.179 +    ulong   low;
  12.180 +    ulong   high;
  12.181 +    } CPU_largeInteger;
  12.182 +#pragma pack()
  12.183 +
  12.184 +/*-------------------------- Function Prototypes --------------------------*/
  12.185 +
  12.186 +#ifdef  __cplusplus
  12.187 +extern "C" {            /* Use "C" linkage when in C++ mode */
  12.188 +#endif
  12.189 +
  12.190 +/* Routines to obtain CPU information */
  12.191 +
  12.192 +uint    ZAPI CPU_getProcessorType(void);
  12.193 +ibool   ZAPI CPU_haveMMX(void);
  12.194 +ibool   ZAPI CPU_have3DNow(void);
  12.195 +ibool   ZAPI CPU_haveSSE(void);
  12.196 +ibool   ZAPI CPU_haveRDTSC(void);
  12.197 +ulong   ZAPI CPU_getProcessorSpeed(ibool accurate);
  12.198 +void    ZAPI CPU_getProcessorSpeedInHZ(ibool accurate,CPU_largeInteger *speed);
  12.199 +char *  ZAPI CPU_getProcessorName(void);
  12.200 +
  12.201 +#ifdef  __cplusplus
  12.202 +}                       /* End of "C" linkage for C++   */
  12.203 +#endif
  12.204 +
  12.205 +#endif  /* __CPUINFO_H */
  12.206 +
    13.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    13.2 +++ b/src/cpuinfo/gcpuinfo.c	Tue Nov 18 01:27:06 2003 +0000
    13.3 @@ -0,0 +1,436 @@
    13.4 +/****************************************************************************
    13.5 +*
    13.6 +*                   SciTech OS Portability Manager Library
    13.7 +*
    13.8 +*  ========================================================================
    13.9 +*
   13.10 +*   Copyright (C) 1991-2002 SciTech Software, Inc. All rights reserved.
   13.11 +*
   13.12 +*   This file may be distributed and/or modified under the terms of the
   13.13 +*   GNU Lesser General Public License version 2.1 as published by the Free
   13.14 +*   Software Foundation and appearing in the file LICENSE.LGPL included
   13.15 +*   in the packaging of this file.
   13.16 +*
   13.17 +*   Licensees holding a valid Commercial License for this product from
   13.18 +*   SciTech Software, Inc. may use this file in accordance with the
   13.19 +*   Commercial License Agreement provided with the Software.
   13.20 +*
   13.21 +*   This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING
   13.22 +*   THE WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
   13.23 +*   PURPOSE.
   13.24 +*
   13.25 +*   See http://www.scitechsoft.com/license/ for information about
   13.26 +*   the licensing options available and how to purchase a Commercial
   13.27 +*   License Agreement.
   13.28 +*
   13.29 +*   Contact license@scitechsoft.com if any conditions of this licensing
   13.30 +*   are not clear to you, or you have questions about licensing options.
   13.31 +*
   13.32 +*  ========================================================================
   13.33 +*
   13.34 +* Language:     ANSI C
   13.35 +* Environment:  Any
   13.36 +*
   13.37 +* Description:  Main module to implement the Zen Timer support functions.
   13.38 +*
   13.39 +****************************************************************************/
   13.40 +
   13.41 +#include "cpuinfo.h"
   13.42 +//#include "pmapi.h"
   13.43 +//#include "oshdr.h"
   13.44 +
   13.45 +/*----------------------------- Implementation ----------------------------*/
   13.46 +
   13.47 +/* External Intel assembler functions */
   13.48 +#ifdef  __INTEL__
   13.49 +/* {secret} */
   13.50 +ibool   _ASMAPI _CPU_haveCPUID(void);
   13.51 +/* {secret} */
   13.52 +ibool   _ASMAPI _CPU_check80386(void);
   13.53 +/* {secret} */
   13.54 +ibool   _ASMAPI _CPU_check80486(void);
   13.55 +/* {secret} */
   13.56 +uint    _ASMAPI _CPU_checkCPUID(void);
   13.57 +/* {secret} */
   13.58 +uint    _ASMAPI _CPU_getCPUIDModel(void);
   13.59 +/* {secret} */
   13.60 +uint    _ASMAPI _CPU_getCPUIDStepping(void);
   13.61 +/* {secret} */
   13.62 +uint    _ASMAPI _CPU_getCPUIDFeatures(void);
   13.63 +/* {secret} */
   13.64 +uint    _ASMAPI _CPU_getCacheSize(void);
   13.65 +/* {secret} */
   13.66 +uint    _ASMAPI _CPU_have3DNow(void);
   13.67 +/* {secret} */
   13.68 +ibool   _ASMAPI _CPU_checkClone(void);
   13.69 +/* {secret} */
   13.70 +void    _ASMAPI _CPU_readTimeStamp(CPU_largeInteger *time);
   13.71 +/* {secret} */
   13.72 +void    _ASMAPI _CPU_runBSFLoop(ulong iterations);
   13.73 +/* {secret} */
   13.74 +ulong   _ASMAPI _CPU_mulDiv(ulong a,ulong b,ulong c);
   13.75 +/* {secret} */
   13.76 +#define CPU_HaveMMX     0x00800000
   13.77 +#define CPU_HaveRDTSC   0x00000010
   13.78 +#define CPU_HaveSSE     0x02000000
   13.79 +#endif
   13.80 +
   13.81 +/*------------------------ Public interface routines ----------------------*/
   13.82 +
   13.83 +#ifdef __INTEL__
   13.84 +extern Uint8 PM_inpb(int port);
   13.85 +extern void PM_outpb(int port,Uint8 val);
   13.86 +
   13.87 +/****************************************************************************
   13.88 +REMARKS:
   13.89 +Read an I/O port location.
   13.90 +****************************************************************************/
   13.91 +static uchar rdinx(
   13.92 +    int port,
   13.93 +    int index)
   13.94 +{
   13.95 +    PM_outpb(port,(uchar)index);
   13.96 +    return PM_inpb(port+1);
   13.97 +}
   13.98 +
   13.99 +/****************************************************************************
  13.100 +REMARKS:
  13.101 +Write an I/O port location.
  13.102 +****************************************************************************/
  13.103 +static void wrinx(
  13.104 +    ushort port,
  13.105 +    ushort index,
  13.106 +    ushort value)
  13.107 +{
  13.108 +    PM_outpb(port,(uchar)index);
  13.109 +    PM_outpb(port+1,(uchar)value);
  13.110 +}
  13.111 +
  13.112 +/****************************************************************************
  13.113 +REMARKS:
  13.114 +Enables the Cyrix CPUID instruction to properly detect MediaGX and 6x86
  13.115 +processors.
  13.116 +****************************************************************************/
  13.117 +static void _CPU_enableCyrixCPUID(void)
  13.118 +{
  13.119 +    uchar   ccr3;
  13.120 +
  13.121 +    //PM_init();
  13.122 +    ccr3 = rdinx(0x22,0xC3);
  13.123 +    wrinx(0x22,0xC3,(uchar)(ccr3 | 0x10));
  13.124 +    wrinx(0x22,0xE8,(uchar)(rdinx(0x22,0xE8) | 0x80));
  13.125 +    wrinx(0x22,0xC3,ccr3);
  13.126 +}
  13.127 +#endif
  13.128 +
  13.129 +/****************************************************************************
  13.130 +DESCRIPTION:
  13.131 +Returns the type of processor in the system.
  13.132 +
  13.133 +HEADER:
  13.134 +cpuinfo.h
  13.135 +
  13.136 +RETURNS:
  13.137 +Numerical identifier for the installed processor
  13.138 +
  13.139 +REMARKS:
  13.140 +Returns the type of processor in the system. Note that if the CPU is an
  13.141 +unknown Pentium family processor that we don't have an enumeration for,
  13.142 +the return value will be greater than or equal to the value of CPU_UnkPentium
  13.143 +(depending on the value returned by the CPUID instruction).
  13.144 +
  13.145 +SEE ALSO:
  13.146 +CPU_getProcessorSpeed, CPU_haveMMX, CPU_getProcessorName
  13.147 +****************************************************************************/
  13.148 +uint ZAPI CPU_getProcessorType(void)
  13.149 +{
  13.150 +#if     defined(__INTEL__)
  13.151 +    uint            cpu,vendor,model,cacheSize;
  13.152 +    static ibool    firstTime = true;
  13.153 +
  13.154 +    if (_CPU_haveCPUID()) {
  13.155 +        cpu = _CPU_checkCPUID();
  13.156 +        vendor = cpu & ~CPU_mask;
  13.157 +        if (vendor == CPU_Intel) {
  13.158 +            /* Check for Intel processors */
  13.159 +            switch (cpu & CPU_mask) {
  13.160 +                case 4: cpu = CPU_i486;         break;
  13.161 +                case 5: cpu = CPU_Pentium;      break;
  13.162 +                case 6:
  13.163 +                    if ((model = _CPU_getCPUIDModel()) == 1)
  13.164 +                        cpu = CPU_PentiumPro;
  13.165 +                    else if (model <= 6) {
  13.166 +                        cacheSize = _CPU_getCacheSize();
  13.167 +                        if ((model == 5 && cacheSize == 0) ||
  13.168 +                            (model == 5 && cacheSize == 256) ||
  13.169 +                            (model == 6 && cacheSize == 128))
  13.170 +                            cpu = CPU_Celeron;
  13.171 +                        else
  13.172 +                            cpu = CPU_PentiumII;
  13.173 +                        }
  13.174 +                    else if (model >= 7) {
  13.175 +                        /* Model 7 == Pentium III */
  13.176 +                        /* Model 8 == Celeron/Pentium III Coppermine */
  13.177 +                        cacheSize = _CPU_getCacheSize();
  13.178 +                        if ((model == 8 && cacheSize == 128))
  13.179 +                            cpu = CPU_Celeron;
  13.180 +                        else
  13.181 +                            cpu = CPU_PentiumIII;
  13.182 +                        }
  13.183 +                    break;
  13.184 +                case 7:
  13.185 +                    cpu = CPU_Pentium4;
  13.186 +                    break;
  13.187 +                default:
  13.188 +                    cpu = CPU_UnkIntel;
  13.189 +                    break;
  13.190 +                }
  13.191 +            }
  13.192 +        else if (vendor == CPU_Cyrix) {
  13.193 +            /* Check for Cyrix processors */
  13.194 +            switch (cpu & CPU_mask) {
  13.195 +                case 4:
  13.196 +                    if ((model = _CPU_getCPUIDModel()) == 4)
  13.197 +                        cpu = CPU_CyrixMediaGX;
  13.198 +                    else
  13.199 +                        cpu = CPU_UnkCyrix;
  13.200 +                    break;
  13.201 +                case 5:
  13.202 +                    if ((model = _CPU_getCPUIDModel()) == 2)
  13.203 +                        cpu = CPU_Cyrix6x86;
  13.204 +                    else if (model == 4)
  13.205 +                        cpu = CPU_CyrixMediaGXm;
  13.206 +                    else
  13.207 +                        cpu = CPU_UnkCyrix;
  13.208 +                    break;
  13.209 +                case 6:
  13.210 +                    if ((model = _CPU_getCPUIDModel()) <= 1)
  13.211 +                        cpu = CPU_Cyrix6x86MX;
  13.212 +                    else
  13.213 +                        cpu = CPU_UnkCyrix;
  13.214 +                    break;
  13.215 +                default:
  13.216 +                    cpu = CPU_UnkCyrix;
  13.217 +                    break;
  13.218 +                }
  13.219 +            }
  13.220 +        else if (vendor == CPU_AMD) {
  13.221 +            /* Check for AMD processors */
  13.222 +            switch (cpu & CPU_mask) {
  13.223 +                case 4:
  13.224 +                    if ((model = _CPU_getCPUIDModel()) == 0)
  13.225 +                        cpu = CPU_AMDAm5x86;
  13.226 +                    else
  13.227 +                        cpu = CPU_AMDAm486;
  13.228 +                    break;
  13.229 +                case 5:
  13.230 +                    if ((model = _CPU_getCPUIDModel()) <= 3)
  13.231 +                        cpu = CPU_AMDK5;
  13.232 +                    else if (model <= 7)
  13.233 +                        cpu = CPU_AMDK6;
  13.234 +                    else if (model == 8)
  13.235 +                        cpu = CPU_AMDK6_2;
  13.236 +                    else if (model == 9)
  13.237 +                        cpu = CPU_AMDK6_III;
  13.238 +                    else if (model == 13) {
  13.239 +                        if (_CPU_getCPUIDStepping() <= 3)
  13.240 +                            cpu = CPU_AMDK6_IIIplus;
  13.241 +                        else
  13.242 +                            cpu = CPU_AMDK6_2plus;
  13.243 +                        }
  13.244 +                    else
  13.245 +                        cpu = CPU_UnkAMD;
  13.246 +                    break;
  13.247 +                case 6:
  13.248 +                    if ((model = _CPU_getCPUIDModel()) == 3)
  13.249 +                        cpu = CPU_AMDDuron;
  13.250 +                    else
  13.251 +                        cpu = CPU_AMDAthlon;
  13.252 +                    break;
  13.253 +                default:
  13.254 +                    cpu = CPU_UnkAMD;
  13.255 +                    break;
  13.256 +                }
  13.257 +            }
  13.258 +        else if (vendor == CPU_IDT) {
  13.259 +            /* Check for IDT WinChip processors */
  13.260 +            switch (cpu & CPU_mask) {
  13.261 +                case 5:
  13.262 +                    if ((model = _CPU_getCPUIDModel()) <= 4)
  13.263 +                        cpu = CPU_WinChipC6;
  13.264 +                    else if (model == 8)
  13.265 +                        cpu = CPU_WinChip2;
  13.266 +                    else
  13.267 +                        cpu = CPU_UnkIDT;
  13.268 +                    break;
  13.269 +                case 6:
  13.270 +                    vendor = CPU_VIA;
  13.271 +                    if ((model = _CPU_getCPUIDModel()) <= 6)
  13.272 +                        cpu = CPU_ViaCyrixIII;
  13.273 +                    else
  13.274 +                        cpu = CPU_UnkVIA;
  13.275 +                    break;
  13.276 +                default:
  13.277 +                    vendor = CPU_VIA;
  13.278 +                    cpu = CPU_UnkVIA;
  13.279 +                    break;
  13.280 +                }
  13.281 +            }
  13.282 +        else {
  13.283 +            /* Assume a Pentium compatible Intel clone */
  13.284 +            cpu = CPU_Pentium;
  13.285 +            }
  13.286 +        return cpu | vendor | (_CPU_getCPUIDStepping() << CPU_steppingShift);
  13.287 +        }
  13.288 +    else {
  13.289 +        if (_CPU_check80386())
  13.290 +            cpu = CPU_i386;
  13.291 +        else  if (_CPU_check80486()) {
  13.292 +            /* If we get here we may have a Cyrix processor so we can try
  13.293 +             * enabling the CPUID instruction and trying again.
  13.294 +             */
  13.295 +            if (firstTime) {
  13.296 +                firstTime = false;
  13.297 +                _CPU_enableCyrixCPUID();
  13.298 +                return CPU_getProcessorType();
  13.299 +                }
  13.300 +            cpu = CPU_i486;
  13.301 +            }
  13.302 +        else
  13.303 +            cpu = CPU_Pentium;
  13.304 +        if (!_CPU_checkClone())
  13.305 +            return cpu | CPU_Intel;
  13.306 +        return cpu;
  13.307 +        }
  13.308 +#elif   defined(__ALPHA__)
  13.309 +    return CPU_Alpha;
  13.310 +#elif   defined(__MIPS__)
  13.311 +    return CPU_Mips;
  13.312 +#elif   defined(__PPC__)
  13.313 +    return CPU_PowerPC;
  13.314 +#endif
  13.315 +}
  13.316 +
  13.317 +/****************************************************************************
  13.318 +DESCRIPTION:
  13.319 +Returns true if the processor supports Intel MMX extensions.
  13.320 +
  13.321 +HEADER:
  13.322 +cpuinfo.h
  13.323 +
  13.324 +RETURNS:
  13.325 +True if MMX is available, false if not.
  13.326 +
  13.327 +REMARKS:
  13.328 +This function determines if the processor supports the Intel MMX extended
  13.329 +instruction set.
  13.330 +
  13.331 +SEE ALSO:
  13.332 +CPU_getProcessorType, CPU_getProcessorSpeed, CPU_have3DNow, CPU_haveSSE,
  13.333 +CPU_getProcessorName
  13.334 +****************************************************************************/
  13.335 +ibool ZAPI CPU_haveMMX(void)
  13.336 +{
  13.337 +#ifdef  __INTEL__
  13.338 +    if (_CPU_haveCPUID())
  13.339 +        return (_CPU_getCPUIDFeatures() & CPU_HaveMMX) != 0;
  13.340 +    return false;
  13.341 +#else
  13.342 +    return false;
  13.343 +#endif
  13.344 +}
  13.345 +
  13.346 +/****************************************************************************
  13.347 +DESCRIPTION:
  13.348 +Returns true if the processor supports AMD 3DNow! extensions.
  13.349 +
  13.350 +HEADER:
  13.351 +cpuinfo.h
  13.352 +
  13.353 +RETURNS:
  13.354 +True if 3DNow! is available, false if not.
  13.355 +
  13.356 +REMARKS:
  13.357 +This function determines if the processor supports the AMD 3DNow! extended
  13.358 +instruction set.
  13.359 +
  13.360 +SEE ALSO:
  13.361 +CPU_getProcessorType, CPU_getProcessorSpeed, CPU_haveMMX, CPU_haveSSE,
  13.362 +CPU_getProcessorName
  13.363 +****************************************************************************/
  13.364 +ibool ZAPI CPU_have3DNow(void)
  13.365 +{
  13.366 +#ifdef  __INTEL__
  13.367 +    if (_CPU_haveCPUID())
  13.368 +        return _CPU_have3DNow();
  13.369 +    return false;
  13.370 +#else
  13.371 +    return false;
  13.372 +#endif
  13.373 +}
  13.374 +
  13.375 +/****************************************************************************
  13.376 +DESCRIPTION:
  13.377 +Returns true if the processor supports Intel SSE extensions.
  13.378 +
  13.379 +HEADER:
  13.380 +cpuinfo.h
  13.381 +
  13.382 +RETURNS:
  13.383 +True if Intel SSE is available, false if not.
  13.384 +
  13.385 +REMARKS:
  13.386 +This function determines if the processor supports the Intel SSE extended
  13.387 +instruction set.
  13.388 +
  13.389 +SEE ALSO:
  13.390 +CPU_getProcessorType, CPU_getProcessorSpeed, CPU_haveMMX, CPU_have3DNow,
  13.391 +CPU_getProcessorName
  13.392 +****************************************************************************/
  13.393 +ibool ZAPI CPU_haveSSE(void)
  13.394 +{
  13.395 +#ifdef  __INTEL__
  13.396 +    if (_CPU_haveCPUID())
  13.397 +        return (_CPU_getCPUIDFeatures() & CPU_HaveSSE) != 0;
  13.398 +    return false;
  13.399 +#else
  13.400 +    return false;
  13.401 +#endif
  13.402 +}
  13.403 +
  13.404 +/****************************************************************************
  13.405 +RETURNS:
  13.406 +True if the RTSC instruction is available, false if not.
  13.407 +
  13.408 +REMARKS:
  13.409 +This function determines if the processor supports the Intel RDTSC
  13.410 +instruction, for high precision timing. If the processor is not an Intel or
  13.411 +Intel clone CPU, this function will always return false.
  13.412 +
  13.413 +DESCRIPTION:
  13.414 +Returns true if the processor supports RDTSC extensions.
  13.415 +
  13.416 +HEADER:
  13.417 +cpuinfo.h
  13.418 +
  13.419 +RETURNS:
  13.420 +True if RTSC is available, false if not.
  13.421 +
  13.422 +REMARKS:
  13.423 +This function determines if the processor supports the RDTSC instruction
  13.424 +for reading the processor time stamp counter.
  13.425 +
  13.426 +SEE ALSO:
  13.427 +CPU_getProcessorType, CPU_getProcessorSpeed, CPU_haveMMX, CPU_have3DNow,
  13.428 +CPU_getProcessorName
  13.429 +****************************************************************************/
  13.430 +ibool ZAPI CPU_haveRDTSC(void)
  13.431 +{
  13.432 +#ifdef  __INTEL__
  13.433 +    if (_CPU_haveCPUID())
  13.434 +        return (_CPU_getCPUIDFeatures() & CPU_HaveRDTSC) != 0;
  13.435 +    return false;
  13.436 +#else
  13.437 +    return false;
  13.438 +#endif
  13.439 +}
    14.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    14.2 +++ b/src/cpuinfo/scitech.mac	Tue Nov 18 01:27:06 2003 +0000
    14.3 @@ -0,0 +1,714 @@
    14.4 +;****************************************************************************
    14.5 +;*
    14.6 +;*  ========================================================================
    14.7 +;*
    14.8 +;*   Copyright (C) 1991-2002 SciTech Software, Inc. All rights reserved.
    14.9 +;*
   14.10 +;*   This file may be distributed and/or modified under the terms of the
   14.11 +;*   GNU Lesser General Public License version 2.1 as published by the Free
   14.12 +;*   Software Foundation and appearing in the file LICENSE.LGPL included
   14.13 +;*   in the packaging of this file.
   14.14 +;*
   14.15 +;*   Licensees holding a valid Commercial License for this product from
   14.16 +;*   SciTech Software, Inc. may use this file in accordance with the
   14.17 +;*   Commercial License Agreement provided with the Software.
   14.18 +;*
   14.19 +;*   This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING
   14.20 +;*   THE WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
   14.21 +;*   PURPOSE.
   14.22 +;*
   14.23 +;*   See http://www.scitechsoft.com/license/ for information about
   14.24 +;*   the licensing options available and how to purchase a Commercial
   14.25 +;*   License Agreement.
   14.26 +;*
   14.27 +;*   Contact license@scitechsoft.com if any conditions of this licensing
   14.28 +;*   are not clear to you, or you have questions about licensing options.
   14.29 +;*
   14.30 +;*  ========================================================================
   14.31 +;*
   14.32 +;* Language:    NetWide Assembler (NASM)
   14.33 +;* Environment: Any Intel IA32 Environment
   14.34 +;*
   14.35 +;* Description: Macros to provide memory model independant assembly language
   14.36 +;*              module for C programming. Supports the large and flat memory
   14.37 +;*              models.
   14.38 +;*
   14.39 +;*              The defines that you should use when assembling modules that
   14.40 +;*              use this macro package are:
   14.41 +;*
   14.42 +;*                  __FLAT__    Assemble for 32-bit FLAT memory model
   14.43 +;*                  __NOU__     No underscore for all external C labels
   14.44 +;*                  __NOU_VAR__ No underscore for global variables only
   14.45 +;*
   14.46 +;*              The default settings are for 16-bit large memory model with
   14.47 +;*              leading underscores for symbol names.
   14.48 +;*
   14.49 +;****************************************************************************
   14.50 +
   14.51 +%ifndef SCITECH_MAC
   14.52 +%define SCITECH_MAC
   14.53 +
   14.54 +; Turn off underscores for globals if disabled for all externals
   14.55 +
   14.56 +%ifdef  __NOU__
   14.57 +%define __NOU_VAR__
   14.58 +%endif
   14.59 +
   14.60 +; Determine if we should use COFF style segment naming
   14.61 +
   14.62 +%ifdef __MSC__
   14.63 +%define __COFF__
   14.64 +%endif
   14.65 +%ifdef __GNUC__
   14.66 +%define __COFF__
   14.67 +%endif
   14.68 +
   14.69 +; Define the __WINDOWS__ symbol if we are compiling for any Windows
   14.70 +; environment
   14.71 +
   14.72 +%ifdef  __WINDOWS16__
   14.73 +%define __WINDOWS__         1
   14.74 +%endif
   14.75 +%ifdef  __WINDOWS32__
   14.76 +%define __WINDOWS__         1
   14.77 +%define __WINDOWS32_386__   1
   14.78 +%endif
   14.79 +
   14.80 +; Macros for accessing 'generic' registers
   14.81 +
   14.82 +%ifdef  __FLAT__
   14.83 +%idefine _ax    eax
   14.84 +%idefine _bx    ebx
   14.85 +%idefine _cx    ecx
   14.86 +%idefine _dx    edx
   14.87 +%idefine _si    esi
   14.88 +%idefine _di    edi
   14.89 +%idefine _bp    ebp
   14.90 +%idefine _sp    esp
   14.91 +%idefine _es
   14.92 +%idefine UCHAR  BYTE        ; Size of a character
   14.93 +%idefine USHORT WORD        ; Size of a short
   14.94 +%idefine UINT   DWORD       ; Size of an integer
   14.95 +%idefine ULONG  DWORD       ; Size of a long
   14.96 +%idefine BOOL   DWORD       ; Size of a boolean
   14.97 +%idefine DPTR   DWORD       ; Size of a data pointer
   14.98 +%idefine FDPTR  FWORD       ; Size of a far data pointer
   14.99 +%idefine NDPTR  DWORD       ; Size of a near data pointer
  14.100 +%idefine CPTR   DWORD       ; Size of a code pointer
  14.101 +%idefine FCPTR  FWORD       ; Size of a far code pointer
  14.102 +%idefine NCPTR  DWORD       ; Size of a near code pointer
  14.103 +%idefine FPTR   NEAR        ; Distance for function pointers
  14.104 +%idefine DUINT  dd          ; Declare a integer variable
  14.105 +%idefine intsize 4
  14.106 +%idefine flatmodel 1
  14.107 +%else
  14.108 +%idefine _ax    ax
  14.109 +%idefine _bx    bx
  14.110 +%idefine _cx    cx
  14.111 +%idefine _dx    dx
  14.112 +%idefine _si    si
  14.113 +%idefine _di    di
  14.114 +%idefine _bp    bp
  14.115 +%idefine _sp    sp
  14.116 +%idefine _es    es:
  14.117 +%idefine UCHAR  BYTE        ; Size of a character
  14.118 +%idefine USHORT WORD        ; Size of a short
  14.119 +%idefine UINT   WORD        ; Size of an integer
  14.120 +%idefine ULONG  DWORD       ; Size of a long
  14.121 +%idefine BOOL   WORD        ; Size of a boolean
  14.122 +%idefine DPTR   DWORD       ; Size of a data pointer
  14.123 +%idefine FDPTR  DWORD       ; Size of a far data pointer
  14.124 +%idefine NDPTR  WORD        ; Size of a near data pointer
  14.125 +%idefine CPTR   DWORD       ; Size of a code pointer
  14.126 +%idefine FCPTR  DWORD       ; Size of a far code pointer
  14.127 +%idefine NCPTR  WORD        ; Size of a near code pointer
  14.128 +%idefine FPTR   FAR         ; Distance for function pointers
  14.129 +%idefine DUINT  dw          ; Declare a integer variable
  14.130 +%idefine intsize 2
  14.131 +%endif
  14.132 +%idefine invert ~
  14.133 +%idefine offset
  14.134 +%idefine use_nasm
  14.135 +
  14.136 +; Convert all jumps to near jumps, since NASM does not so this automatically
  14.137 +
  14.138 +%idefine jo     jo near
  14.139 +%idefine jno    jno near
  14.140 +%idefine jz     jz near
  14.141 +%idefine jnz    jnz near
  14.142 +%idefine je     je near
  14.143 +%idefine jne    jne near
  14.144 +%idefine jb     jb  near
  14.145 +%idefine jbe    jbe near
  14.146 +%idefine ja     ja  near
  14.147 +%idefine jae    jae near
  14.148 +%idefine jl     jl  near
  14.149 +%idefine jle    jle near
  14.150 +%idefine jg     jg  near
  14.151 +%idefine jge    jge near
  14.152 +%idefine jc     jc  near
  14.153 +%idefine jnc    jnc near
  14.154 +%idefine js     js  near
  14.155 +%idefine jns    jns near
  14.156 +
  14.157 +%ifdef  DOUBLE
  14.158 +%idefine    REAL    QWORD
  14.159 +%idefine    DREAL   dq
  14.160 +%else
  14.161 +%idefine    REAL    DWORD
  14.162 +%idefine    DREAL   dd
  14.163 +%endif
  14.164 +
  14.165 +; Boolean truth values (same as those in debug.h)
  14.166 +
  14.167 +%idefine False      0
  14.168 +%idefine True       1
  14.169 +%idefine No         0
  14.170 +%idefine Yes        1
  14.171 +%idefine Yes        1
  14.172 +
  14.173 +; TODO: If we wish to port VxD code to NASM, we will potentially
  14.174 +;       need special macros in here to handle this!
  14.175 +
  14.176 +; Setup all correct segment definitions and attributes once at the
  14.177 +; beginning of the assembler module. This allows us to open/close
  14.178 +; code and data segments at will throughout the code as necessary.
  14.179 +
  14.180 +%ifdef __PIC__
  14.181 +%ifdef __LINUX__
  14.182 +        extern _GLOBAL_OFFSET_TABLE_
  14.183 +%else
  14.184 +        extern __GLOBAL_OFFSET_TABLE_
  14.185 +%endif
  14.186 +%endif
  14.187 +%ifdef __COFF__
  14.188 +segment .text public class=CODE use32 flat
  14.189 +segment .data public class=DATA use32 flat
  14.190 +%else
  14.191 +%ifdef flatmodel
  14.192 +segment _TEXT public align=16 class=CODE use32 flat
  14.193 +segment _DATA public align=4 class=DATA use32 flat
  14.194 +%else
  14.195 +segment _TEXT public align=16 class=CODE use16
  14.196 +segment _DATA public align=4 class=DATA use16
  14.197 +%endif
  14.198 +%endif
  14.199 +
  14.200 +; Macro to be invoked at the start of all modules to set up segments for
  14.201 +; later use. This does nothing for 32-bit code, but for 16-bit code
  14.202 +; will set up a far model code segment as well for later use.
  14.203 +
  14.204 +%imacro header 1
  14.205 +%ifndef flatmodel
  14.206 +segment %1_TEXT public align=16 class=CODE use16
  14.207 +%endif
  14.208 +%endmacro
  14.209 +
  14.210 +; Macro to begin a data segment. Segment attributes were specified in
  14.211 +; the header macro that is always required.
  14.212 +
  14.213 +%imacro begdataseg 1
  14.214 +%ifdef __COFF__
  14.215 +segment .data
  14.216 +%else
  14.217 +segment _DATA
  14.218 +%endif
  14.219 +%endmacro
  14.220 +
  14.221 +; Macro to end a data segment
  14.222 +
  14.223 +%imacro enddataseg 1
  14.224 +%endmacro
  14.225 +
  14.226 +; Macro to begin a code segment
  14.227 +
  14.228 +%imacro begcodeseg 1
  14.229 +%ifdef __COFF__
  14.230 +segment .text
  14.231 +%else
  14.232 +%ifdef flatmodel
  14.233 +segment _TEXT
  14.234 +%else
  14.235 +segment %1_TEXT
  14.236 +%endif
  14.237 +%endif
  14.238 +%endmacro
  14.239 +
  14.240 +; Macro to end a code segment
  14.241 +
  14.242 +%imacro endcodeseg 1
  14.243 +%endmacro
  14.244 +
  14.245 +; Macro to begin a near code segment
  14.246 +
  14.247 +%imacro begcodeseg_near 0
  14.248 +%ifdef __COFF__
  14.249 +segment .text
  14.250 +%else
  14.251 +segment _TEXT
  14.252 +%endif
  14.253 +%endmacro
  14.254 +
  14.255 +; Macro to end a near code segment
  14.256 +
  14.257 +%imacro endcodeseg_near 0
  14.258 +%endmacro
  14.259 +
  14.260 +; Macro for an extern C symbol. If the C compiler requires leading
  14.261 +; underscores, then the underscores are added to the symbol names, otherwise
  14.262 +; they are left off. The symbol name is referenced in the assembler code
  14.263 +; using the non-underscored symbol name.
  14.264 +
  14.265 +%imacro cextern 2
  14.266 +%ifdef  __NOU_VAR__
  14.267 +extern %1
  14.268 +%else
  14.269 +extern _%1
  14.270 +%define %1 _%1
  14.271 +%endif
  14.272 +%endmacro
  14.273 +
  14.274 +%imacro cexternfunc 2
  14.275 +%ifdef  __NOU__
  14.276 +extern %1
  14.277 +%else
  14.278 +extern _%1
  14.279 +%define %1 _%1
  14.280 +%endif
  14.281 +%endmacro
  14.282 +
  14.283 +; Macro for a public C symbol. If the C compiler requires leading
  14.284 +; underscores, then the underscores are added to the symbol names, otherwise
  14.285 +; they are left off. The symbol name is referenced in the assembler code
  14.286 +; using the non-underscored symbol name.
  14.287 +
  14.288 +%imacro cpublic 1
  14.289 +%ifdef  __NOU_VAR__
  14.290 +global %1
  14.291 +%1:
  14.292 +%else
  14.293 +global _%1
  14.294 +_%1:
  14.295 +%define %1 _%1
  14.296 +%endif
  14.297 +%endmacro
  14.298 +
  14.299 +; Macro for an global C symbol. If the C compiler requires leading
  14.300 +; underscores, then the underscores are added to the symbol names, otherwise
  14.301 +; they are left off. The symbol name is referenced in the assembler code
  14.302 +; using the non-underscored symbol name.
  14.303 +
  14.304 +%imacro cglobal 1
  14.305 +%ifdef  __NOU_VAR__
  14.306 +global %1
  14.307 +%else
  14.308 +global _%1
  14.309 +%define %1 _%1
  14.310 +%endif
  14.311 +%endmacro
  14.312 +
  14.313 +; Macro for an global C function symbol. If the C compiler requires leading
  14.314 +; underscores, then the underscores are added to the symbol names, otherwise
  14.315 +; they are left off. The symbol name is referenced in the assembler code
  14.316 +; using the non-underscored symbol name.
  14.317 +
  14.318 +%imacro cglobalfunc 1
  14.319 +%ifdef __PIC__
  14.320 +global %1:function
  14.321 +%else
  14.322 +%ifdef  __NOU__
  14.323 +global %1
  14.324 +%else
  14.325 +global _%1
  14.326 +%define %1 _%1
  14.327 +%endif
  14.328 +%endif
  14.329 +%endmacro
  14.330 +
  14.331 +; Macro to start a C callable function. This will be a far function for
  14.332 +; 16-bit code, and a near function for 32-bit code.
  14.333 +
  14.334 +%imacro cprocstatic 1
  14.335 +%push cproc
  14.336 +%1:
  14.337 +%ifdef flatmodel
  14.338 +%stacksize flat
  14.339 +%define ret retn
  14.340 +%else
  14.341 +%stacksize large
  14.342 +%define ret retf
  14.343 +%endif
  14.344 +%assign %$localsize 0
  14.345 +%endmacro
  14.346 +
  14.347 +%imacro cprocstart 1
  14.348 +%push cproc
  14.349 +    cglobalfunc %1
  14.350 +%1:
  14.351 +%ifdef flatmodel
  14.352 +%stacksize flat
  14.353 +%define ret retn
  14.354 +%else
  14.355 +%stacksize large
  14.356 +%define ret retf
  14.357 +%endif
  14.358 +%assign %$localsize 0
  14.359 +%endmacro
  14.360 +
  14.361 +; This macro sets up a procedure to be exported from a 16 bit DLL. Since the
  14.362 +; calling conventions are always _far _pascal for 16 bit DLL's, we actually
  14.363 +; rename this routine with an extra underscore with 'C' calling conventions
  14.364 +; and a small DLL stub will be provided by the high level code to call the
  14.365 +; assembler routine.
  14.366 +
  14.367 +%imacro cprocstartdll16 1
  14.368 +%ifdef  __WINDOWS16__
  14.369 +cprocstart  _%1
  14.370 +%else
  14.371 +cprocstart  %1
  14.372 +%endif
  14.373 +%endmacro
  14.374 +
  14.375 +; Macro to start a C callable near function.
  14.376 +
  14.377 +%imacro cprocnear 1
  14.378 +%push cproc
  14.379 +    cglobalfunc %1
  14.380 +%1:
  14.381 +%define ret retn
  14.382 +%ifdef flatmodel
  14.383 +%stacksize flat
  14.384 +%else
  14.385 +%stacksize small
  14.386 +%endif
  14.387 +%assign %$localsize 0
  14.388 +%endmacro
  14.389 +
  14.390 +; Macro to start a C callable far function.
  14.391 +
  14.392 +%imacro cprocfar 1
  14.393 +%push cproc
  14.394 +    cglobalfunc %1
  14.395 +%1:
  14.396 +%define ret retf
  14.397 +%ifdef flatmodel
  14.398 +%stacksize flat
  14.399 +%else
  14.400 +%stacksize large
  14.401 +%endif
  14.402 +%assign %$localsize 0
  14.403 +%endmacro
  14.404 +
  14.405 +; Macro to end a C function
  14.406 +
  14.407 +%imacro cprocend 0
  14.408 +%pop
  14.409 +%endmacro
  14.410 +
  14.411 +; Macros for entering and exiting C callable functions. Note that we must
  14.412 +; always save and restore the SI and DI registers for C functions, and for
  14.413 +; 32 bit C functions we also need to save and restore EBX and clear the
  14.414 +; direction flag.
  14.415 +
  14.416 +%imacro enter_c 0
  14.417 +        push    _bp
  14.418 +        mov     _bp,_sp
  14.419 +%ifnidn %$localsize,0
  14.420 +        sub     _sp,%$localsize
  14.421 +%endif
  14.422 +%ifdef  flatmodel
  14.423 +        push    ebx
  14.424 +%endif
  14.425 +        push    _si
  14.426 +        push    _di
  14.427 +%endmacro
  14.428 +
  14.429 +%imacro leave_c 0
  14.430 +        pop     _di
  14.431 +        pop     _si
  14.432 +%ifdef  flatmodel
  14.433 +        pop     ebx
  14.434 +        cld
  14.435 +%endif
  14.436 +%ifnidn %$localsize,0
  14.437 +        mov     _sp,_bp
  14.438 +%endif
  14.439 +        pop     _bp
  14.440 +%endmacro
  14.441 +
  14.442 +%imacro   use_ebx 0
  14.443 +%ifdef flatmodel
  14.444 +        push    ebx
  14.445 +%endif
  14.446 +%endmacro
  14.447 +
  14.448 +%imacro   unuse_ebx 0
  14.449 +%ifdef flatmodel
  14.450 +        pop     ebx
  14.451 +%endif
  14.452 +%endmacro
  14.453 +
  14.454 +; Macros for saving and restoring the value of DS,ES,FS,GS when it is to
  14.455 +; be used in assembly routines. This evaluates to nothing in the flat memory
  14.456 +; model, but is saves and restores DS in the large memory model.
  14.457 +
  14.458 +%imacro use_ds 0
  14.459 +%ifndef flatmodel
  14.460 +        push    ds
  14.461 +%endif
  14.462 +%endmacro
  14.463 +
  14.464 +%imacro unuse_ds 0
  14.465 +%ifndef flatmodel
  14.466 +        pop     ds
  14.467 +%endif
  14.468 +%endmacro
  14.469 +
  14.470 +%imacro use_es 0
  14.471 +%ifndef flatmodel
  14.472 +        push    es
  14.473 +%endif
  14.474 +%endmacro
  14.475 +
  14.476 +%imacro unuse_es 0
  14.477 +%ifndef flatmodel
  14.478 +        pop     es
  14.479 +%endif
  14.480 +%endmacro
  14.481 +
  14.482 +; Macros for loading the address of a data pointer into a segment and
  14.483 +; index register pair. The %imacro explicitly loads DS or ES in the 16 bit
  14.484 +; memory model, or it simply loads the offset into the register in the flat
  14.485 +; memory model since DS and ES always point to all addressable memory. You
  14.486 +; must use the correct _REG (ie: _BX) %imacros for documentation purposes.
  14.487 +
  14.488 +%imacro _lds    2
  14.489 +%ifdef flatmodel
  14.490 +        mov     %1,%2
  14.491 +%else
  14.492 +        lds     %1,%2
  14.493 +%endif
  14.494 +%endmacro
  14.495 +
  14.496 +%imacro   _les  2
  14.497 +%ifdef flatmodel
  14.498 +        mov     %1,%2
  14.499 +%else
  14.500 +        les     %1,%2
  14.501 +%endif
  14.502 +%endmacro
  14.503 +
  14.504 +; Macros for adding and subtracting a value from registers. Two value are
  14.505 +; provided, one for 16 bit modes and another for 32 bit modes (the extended
  14.506 +; register is used in 32 bit modes).
  14.507 +
  14.508 +%imacro   _add  3
  14.509 +%ifdef flatmodel
  14.510 +        add     e%1, %3
  14.511 +%else
  14.512 +        add     %1, %2
  14.513 +%endif
  14.514 +%endmacro
  14.515 +
  14.516 +%imacro _sub    3
  14.517 +%ifdef flatmodel
  14.518 +        sub     e%1, %3
  14.519 +%else
  14.520 +        sub     %1, %2
  14.521 +%endif
  14.522 +%endmacro
  14.523 +
  14.524 +; Macro to clear the high order word for the 32 bit extended registers.
  14.525 +; This is used to convert an unsigned 16 bit value to an unsigned 32 bit
  14.526 +; value, and will evaluate to nothing in 16 bit modes.
  14.527 +
  14.528 +%imacro clrhi   1
  14.529 +%ifdef  flatmodel
  14.530 +        movzx   e%1,%1
  14.531 +%endif
  14.532 +%endmacro
  14.533 +
  14.534 +%imacro sgnhi   1
  14.535 +%ifdef  flatmodel
  14.536 +        movsx   e%1,%1
  14.537 +%endif
  14.538 +%endmacro
  14.539 +
  14.540 +; Macro to load an extended register with an integer value in either mode
  14.541 +
  14.542 +%imacro loadint 2
  14.543 +%ifdef flatmodel
  14.544 +        mov     e%1,%2
  14.545 +%else
  14.546 +        xor     e%1,e%1
  14.547 +        mov     %1,%2
  14.548 +%endif
  14.549 +%endmacro
  14.550 +
  14.551 +; Macros to load and store integer values with string instructions
  14.552 +
  14.553 +%imacro LODSINT 0
  14.554 +%ifdef flatmodel
  14.555 +        lodsd
  14.556 +%else
  14.557 +        lodsw
  14.558 +%endif
  14.559 +%endmacro
  14.560 +
  14.561 +%imacro STOSINT 0
  14.562 +%ifdef flatmodel
  14.563 +        stosd
  14.564 +%else
  14.565 +        stosw
  14.566 +%endif
  14.567 +%endmacro
  14.568 +
  14.569 +; Macros to provide resb, resw, resd compatibility with NASM
  14.570 +
  14.571 +%imacro dclb 1
  14.572 +times %1 db 0
  14.573 +%endmacro
  14.574 +
  14.575 +%imacro dclw 1
  14.576 +times %1 dw 0
  14.577 +%endmacro
  14.578 +
  14.579 +%imacro dcld 1
  14.580 +times %1 dd 0
  14.581 +%endmacro
  14.582 +
  14.583 +; Macro to get the addres of the GOT for Linux/FreeBSD shared
  14.584 +; libraries into the EBX register.
  14.585 +
  14.586 +%imacro     get_GOT 1
  14.587 +            call    %%getgot
  14.588 +%%getgot:   pop     %1
  14.589 +            add     %1,_GLOBAL_OFFSET_TABLE_+$$-%%getgot wrt ..gotpc
  14.590 +%endmacro
  14.591 +
  14.592 +; Macro to get the address of a *local* variable that is global to
  14.593 +; a single module in a manner that will work correctly when compiled
  14.594 +; into a Linux shared library. Note that this will *not* work for
  14.595 +; variables that are defined as global to all modules. For that
  14.596 +; use the LEA_G macro
  14.597 +
  14.598 +%macro      LEA_L    2
  14.599 +%ifdef __PIC__
  14.600 +        get_GOT %1
  14.601 +        lea     %1,[%1+%2 wrt ..gotoff]
  14.602 +%else
  14.603 +        lea     %1,[%2]
  14.604 +%endif
  14.605 +%endmacro
  14.606 +
  14.607 +; Same macro as above but for global variables public to *all*
  14.608 +; modules.
  14.609 +
  14.610 +%macro      LEA_G    2
  14.611 +%ifdef __PIC__
  14.612 +        get_GOT %1
  14.613 +        mov     %1,[%1+%2 wrt ..got]
  14.614 +%else
  14.615 +        lea     %1,[%2]
  14.616 +%endif
  14.617 +%endmacro
  14.618 +
  14.619 +; macros to declare assembler function stubs for function structures
  14.620 +
  14.621 +%imacro BEGIN_STUBS_DEF 2
  14.622 +begdataseg  _STUBS
  14.623 +%ifdef  __NOU_VAR__
  14.624 +extern %1
  14.625 +%define STUBS_START %1
  14.626 +%else
  14.627 +extern _%1
  14.628 +%define STUBS_START _%1
  14.629 +%endif
  14.630 +enddataseg  _STUBS
  14.631 +begcodeseg  _STUBS
  14.632 +%assign off %2
  14.633 +%endmacro
  14.634 +
  14.635 +%imacro   DECLARE_STUB  1
  14.636 +%ifdef __PIC__
  14.637 +        global %1:function
  14.638 +%1:
  14.639 +        get_GOT eax
  14.640 +        mov     eax,[eax+STUBS_START wrt ..got]
  14.641 +        jmp     [eax+off]
  14.642 +%else
  14.643 +%ifdef  __NOU__
  14.644 +        global %1
  14.645 +%1:
  14.646 +%else
  14.647 +        global _%1
  14.648 +_%1:
  14.649 +%endif
  14.650 +        jmp     [DWORD STUBS_START+off]
  14.651 +%endif
  14.652 +%assign off off+4
  14.653 +%endmacro
  14.654 +
  14.655 +%imacro   SKIP_STUB  1
  14.656 +%assign off off+4
  14.657 +%endmacro
  14.658 +
  14.659 +%imacro DECLARE_STDCALL 2
  14.660 +%ifdef  STDCALL_MANGLE
  14.661 +        global _%1@%2
  14.662 +_%1@%2:
  14.663 +%else
  14.664 +%ifdef STDCALL_USCORE
  14.665 +        global _%1
  14.666 +_%1:
  14.667 +%else
  14.668 +        global %1
  14.669 +%1:
  14.670 +%endif
  14.671 +%endif
  14.672 +        jmp     [DWORD STUBS_START+off]
  14.673 +%assign off off+4
  14.674 +%endmacro
  14.675 +
  14.676 +%imacro   END_STUBS_DEF 0
  14.677 +endcodeseg  _STUBS
  14.678 +%endmacro
  14.679 +
  14.680 +; macros to declare assembler import stubs for binary loadable drivers
  14.681 +
  14.682 +%imacro BEGIN_IMPORTS_DEF   1
  14.683 +BEGIN_STUBS_DEF %1,4
  14.684 +%endmacro
  14.685 +
  14.686 +ifndef LOCAL_DECLARE_IMP
  14.687 +%imacro   DECLARE_IMP   2
  14.688 +DECLARE_STUB    %1
  14.689 +%endmacro
  14.690 +
  14.691 +%imacro   DECLARE_PTR   2
  14.692 +DECLARE_STUB    %1
  14.693 +%endmacro
  14.694 +
  14.695 +%imacro   SKIP_IMP   2
  14.696 +SKIP_STUB    %1
  14.697 +%endmacro
  14.698 +
  14.699 +%imacro   SKIP_PTR   2
  14.700 +SKIP_STUB    %1
  14.701 +%endmacro
  14.702 +
  14.703 +%imacro   SKIP_IMP2   1
  14.704 +DECLARE_STUB    %1
  14.705 +%endmacro
  14.706 +
  14.707 +%imacro   SKIP_IMP3   1
  14.708 +SKIP_STUB    %1
  14.709 +%endmacro
  14.710 +endif
  14.711 +
  14.712 +%imacro   END_IMPORTS_DEF 0
  14.713 +END_STUBS_DEF
  14.714 +%endmacro
  14.715 +
  14.716 +%endif
  14.717 +
    15.1 --- a/src/video/SDL_RLEaccel.c	Fri Nov 14 20:21:22 2003 +0000
    15.2 +++ b/src/video/SDL_RLEaccel.c	Tue Nov 18 01:27:06 2003 +0000
    15.3 @@ -104,14 +104,7 @@
    15.4  
    15.5  #if defined(i386) && defined(__GNUC__) && defined(USE_ASMBLIT)
    15.6  #include "mmx.h"
    15.7 -/* Function to check the CPU flags */
    15.8 -#define MMX_CPU		0x800000
    15.9 -#define CPU_Flags()	Hermes_X86_CPU()
   15.10 -#define X86_ASSEMBLER
   15.11 -#define HermesConverterInterface	void
   15.12 -#define HermesClearInterface		void
   15.13 -#define STACKCALL
   15.14 -#include "HeadX86.h"
   15.15 +#include "SDL_cpuinfo.h"
   15.16  #endif
   15.17  
   15.18  #ifndef MAX
   15.19 @@ -657,7 +650,7 @@
   15.20  			if(alpha == 128)				\
   15.21  			    blitter(2, Uint8, ALPHA_BLIT16_565_50);	\
   15.22  			else {						\
   15.23 -			    if((CPU_Flags()&MMX_CPU)!=0)		\
   15.24 +			    if(SDL_HasMMX())				\
   15.25  				blitter(2, Uint8, ALPHA_BLIT16_565MMX);	\
   15.26  			    else					\
   15.27  				blitter(2, Uint8, ALPHA_BLIT16_565);	\
   15.28 @@ -673,7 +666,7 @@
   15.29  			if(alpha == 128)				\
   15.30  			    blitter(2, Uint8, ALPHA_BLIT16_555_50);	\
   15.31  			else {						\
   15.32 -			    if((CPU_Flags()&MMX_CPU)!=0)		\
   15.33 +			    if(SDL_HasMMX())				\
   15.34  				blitter(2, Uint8, ALPHA_BLIT16_555MMX);	\
   15.35  			    else					\
   15.36  				blitter(2, Uint8, ALPHA_BLIT16_555);	\
   15.37 @@ -698,14 +691,14 @@
   15.38  		       || fmt->Bmask == 0xff00)) {			\
   15.39  		    if(alpha == 128)					\
   15.40  		    {							\
   15.41 -			if((CPU_Flags()&MMX_CPU)!=0)			\
   15.42 +			if(SDL_HasMMX())				\
   15.43  				blitter(4, Uint16, ALPHA_BLIT32_888_50MMX);\
   15.44  			else						\
   15.45  				blitter(4, Uint16, ALPHA_BLIT32_888_50);\
   15.46  		    }							\
   15.47  		    else						\
   15.48  		    {							\
   15.49 -			if((CPU_Flags()&MMX_CPU)!=0)			\
   15.50 +			if(SDL_HasMMX())				\
   15.51  				blitter(4, Uint16, ALPHA_BLIT32_888MMX);\
   15.52  			else						\
   15.53  				blitter(4, Uint16, ALPHA_BLIT32_888);	\
    16.1 --- a/src/video/SDL_blit.c	Fri Nov 14 20:21:22 2003 +0000
    16.2 +++ b/src/video/SDL_blit.c	Tue Nov 18 01:27:06 2003 +0000
    16.3 @@ -38,16 +38,8 @@
    16.4  #include "SDL_memops.h"
    16.5  
    16.6  #if defined(i386) && defined(__GNUC__) && defined(USE_ASMBLIT)
    16.7 +#include "SDL_cpuinfo.h"
    16.8  #include "mmx.h"
    16.9 -/* Function to check the CPU flags */
   16.10 -#define MMX_CPU		0x800000
   16.11 -#define SSE_CPU		0x2000000
   16.12 -#define CPU_Flags()	Hermes_X86_CPU()
   16.13 -#define X86_ASSEMBLER
   16.14 -#define HermesConverterInterface	void
   16.15 -#define HermesClearInterface		void
   16.16 -#define STACKCALL
   16.17 -#include "HeadX86.h"
   16.18  #endif
   16.19  
   16.20  /* The general purpose software blit routine */
   16.21 @@ -166,9 +158,6 @@
   16.22  	Uint8 *src, *dst;
   16.23  	int w, h;
   16.24  	int srcskip, dstskip;
   16.25 -#if defined(i386) && defined(__GNUC__) && defined(USE_ASMBLIT)
   16.26 -	Uint32 f;
   16.27 -#endif
   16.28  
   16.29  	w = info->d_width*info->dst->BytesPerPixel;
   16.30  	h = info->d_height;
   16.31 @@ -177,8 +166,7 @@
   16.32  	srcskip = w+info->s_skip;
   16.33  	dstskip = w+info->d_skip;
   16.34  #if defined(i386) && defined(__GNUC__) && defined(USE_ASMBLIT)
   16.35 -	f=CPU_Flags();
   16.36 -	if((f&(MMX_CPU|SSE_CPU))==(MMX_CPU|SSE_CPU))
   16.37 +	if(SDL_HasSSE())
   16.38  	{
   16.39  		while ( h-- ) {
   16.40  			SDL_memcpySSE(dst, src, w);
   16.41 @@ -190,7 +178,7 @@
   16.42  		::);
   16.43  	}
   16.44  	else
   16.45 -	if((f&(MMX_CPU))!=0)
   16.46 +	if(SDL_HasMMX())
   16.47  	{
   16.48  		while ( h-- ) {
   16.49  			SDL_memcpyMMX(dst, src, w);
    17.1 --- a/src/video/SDL_blit_A.c	Fri Nov 14 20:21:22 2003 +0000
    17.2 +++ b/src/video/SDL_blit_A.c	Tue Nov 18 01:27:06 2003 +0000
    17.3 @@ -32,16 +32,9 @@
    17.4  #include "SDL_blit.h"
    17.5  
    17.6  #if defined(i386) && defined(__GNUC__) && defined(USE_ASMBLIT)
    17.7 +/* Function to check the CPU flags */
    17.8 +#include "SDL_cpuinfo.h"
    17.9  #include "mmx.h"
   17.10 -/* Function to check the CPU flags */
   17.11 -#define MMX_CPU		0x800000
   17.12 -#define TDNOW_CPU	0x80000000
   17.13 -#define CPU_Flags()	Hermes_X86_CPU()
   17.14 -#define X86_ASSEMBLER
   17.15 -#define HermesConverterInterface	void
   17.16 -#define HermesClearInterface		void
   17.17 -#define STACKCALL
   17.18 -#include "HeadX86.h"
   17.19  #endif
   17.20  
   17.21  /* Functions to perform alpha blended blitting */
   17.22 @@ -1387,7 +1380,7 @@
   17.23  		    if(df->Gmask == 0x7e0)
   17.24  		    {
   17.25  #if defined(i386) && defined(__GNUC__) && defined(USE_ASMBLIT)
   17.26 -		if((CPU_Flags()&MMX_CPU)!=0)
   17.27 +		if(SDL_HasMMX())
   17.28  			return Blit565to565SurfaceAlphaMMX;
   17.29  		else
   17.30  #endif
   17.31 @@ -1396,7 +1389,7 @@
   17.32  		    else if(df->Gmask == 0x3e0)
   17.33  		    {
   17.34  #if defined(i386) && defined(__GNUC__) && defined(USE_ASMBLIT)
   17.35 -		if((CPU_Flags()&MMX_CPU)!=0)
   17.36 +		if(SDL_HasMMX())
   17.37  			return Blit555to555SurfaceAlphaMMX;
   17.38  		else
   17.39  #endif
   17.40 @@ -1413,7 +1406,7 @@
   17.41  		   && sf->BytesPerPixel == 4)
   17.42  		{
   17.43  #if defined(i386) && defined(__GNUC__) && defined(USE_ASMBLIT)
   17.44 -		if((CPU_Flags()&MMX_CPU)!=0)
   17.45 +		if(SDL_HasMMX())
   17.46  		    return BlitRGBtoRGBSurfaceAlphaMMX;
   17.47  		else
   17.48  #endif
   17.49 @@ -1453,12 +1446,10 @@
   17.50  	       && sf->BytesPerPixel == 4)
   17.51  	    {
   17.52  #if defined(i386) && defined(__GNUC__) && defined(USE_ASMBLIT)
   17.53 -		Uint32 f;
   17.54 -		f=CPU_Flags();
   17.55 -		if((f&(TDNOW_CPU|MMX_CPU))==(TDNOW_CPU|MMX_CPU))
   17.56 +		if(SDL_Has3DNow())
   17.57  		    return BlitRGBtoRGBPixelAlphaMMX3DNOW;
   17.58  		else
   17.59 -		if((f&MMX_CPU)!=0)
   17.60 +		if(SDL_HasMMX())
   17.61  		    return BlitRGBtoRGBPixelAlphaMMX;
   17.62  		else
   17.63  #endif
    18.1 --- a/src/video/SDL_blit_N.c	Fri Nov 14 20:21:22 2003 +0000
    18.2 +++ b/src/video/SDL_blit_N.c	Tue Nov 18 01:27:06 2003 +0000
    18.3 @@ -31,14 +31,7 @@
    18.4  #include "SDL_video.h"
    18.5  #include "SDL_blit.h"
    18.6  #include "SDL_byteorder.h"
    18.7 -
    18.8 -/* Function to check the CPU flags */
    18.9 -#define MMX_CPU		0x800000
   18.10 -#ifdef USE_ASMBLIT
   18.11 -#define CPU_Flags()	Hermes_X86_CPU()
   18.12 -#else
   18.13 -#define CPU_Flags()	0L
   18.14 -#endif
   18.15 +#include "SDL_cpuinfo.h"
   18.16  
   18.17  /* Functions to blit from N-bit surfaces to other surfaces */
   18.18  
   18.19 @@ -1429,7 +1422,7 @@
   18.20  	Uint32 srcR, srcG, srcB;
   18.21  	int dstbpp;
   18.22  	Uint32 dstR, dstG, dstB;
   18.23 -	Uint32 cpu_flags;
   18.24 +	SDL_bool cpu_mmx;
   18.25  	void *aux_data;
   18.26  	SDL_loblit blitfunc;
   18.27          enum { NO_ALPHA, SET_ALPHA, COPY_ALPHA } alpha;
   18.28 @@ -1466,19 +1459,19 @@
   18.29  static const struct blit_table normal_blit_4[] = {
   18.30  #ifdef USE_ASMBLIT
   18.31      { 0x00FF0000,0x0000FF00,0x000000FF, 2, 0x0000F800,0x000007E0,0x0000001F,
   18.32 -      MMX_CPU, ConvertMMXpII32_16RGB565, ConvertMMX, NO_ALPHA },
   18.33 +      1, ConvertMMXpII32_16RGB565, ConvertMMX, NO_ALPHA },
   18.34      { 0x00FF0000,0x0000FF00,0x000000FF, 2, 0x0000F800,0x000007E0,0x0000001F,
   18.35        0, ConvertX86p32_16RGB565, ConvertX86, NO_ALPHA },
   18.36      { 0x00FF0000,0x0000FF00,0x000000FF, 2, 0x0000001F,0x000007E0,0x0000F800,
   18.37 -      MMX_CPU, ConvertMMXpII32_16BGR565, ConvertMMX, NO_ALPHA },
   18.38 +      1, ConvertMMXpII32_16BGR565, ConvertMMX, NO_ALPHA },
   18.39      { 0x00FF0000,0x0000FF00,0x000000FF, 2, 0x0000001F,0x000007E0,0x0000F800,
   18.40        0, ConvertX86p32_16BGR565, ConvertX86, NO_ALPHA },
   18.41      { 0x00FF0000,0x0000FF00,0x000000FF, 2, 0x00007C00,0x000003E0,0x0000001F,
   18.42 -      MMX_CPU, ConvertMMXpII32_16RGB555, ConvertMMX, NO_ALPHA },
   18.43 +      1, ConvertMMXpII32_16RGB555, ConvertMMX, NO_ALPHA },
   18.44      { 0x00FF0000,0x0000FF00,0x000000FF, 2, 0x00007C00,0x000003E0,0x0000001F,
   18.45        0, ConvertX86p32_16RGB555, ConvertX86, NO_ALPHA },
   18.46      { 0x00FF0000,0x0000FF00,0x000000FF, 2, 0x0000001F,0x000003E0,0x00007C00,
   18.47 -      MMX_CPU, ConvertMMXpII32_16BGR555, ConvertMMX, NO_ALPHA },
   18.48 +      1, ConvertMMXpII32_16BGR555, ConvertMMX, NO_ALPHA },
   18.49      { 0x00FF0000,0x0000FF00,0x000000FF, 2, 0x0000001F,0x000003E0,0x00007C00,
   18.50        0, ConvertX86p32_16BGR555, ConvertX86, NO_ALPHA },
   18.51      { 0x00FF0000,0x0000FF00,0x000000FF, 3, 0x00FF0000,0x0000FF00,0x000000FF,
   18.52 @@ -1581,8 +1574,7 @@
   18.53  			     dstfmt->Gmask == table[which].dstG &&
   18.54  			     dstfmt->Bmask == table[which].dstB &&
   18.55  			     (a_need & table[which].alpha) == a_need &&
   18.56 -			     (CPU_Flags()&table[which].cpu_flags) ==
   18.57 -			     table[which].cpu_flags )
   18.58 +			     (table[which].cpu_mmx == SDL_HasMMX())) 
   18.59  				break;
   18.60  		}
   18.61  		sdata->aux_data = table[which].aux_data;
    19.1 --- a/src/video/SDL_yuv_sw.c	Fri Nov 14 20:21:22 2003 +0000
    19.2 +++ b/src/video/SDL_yuv_sw.c	Tue Nov 18 01:27:06 2003 +0000
    19.3 @@ -92,27 +92,11 @@
    19.4  
    19.5  #include "SDL_error.h"
    19.6  #include "SDL_video.h"
    19.7 +#include "SDL_cpuinfo.h"
    19.8  #include "SDL_stretch_c.h"
    19.9  #include "SDL_yuvfuncs.h"
   19.10  #include "SDL_yuv_sw_c.h"
   19.11  
   19.12 -/* Function to check the CPU flags */
   19.13 -#define MMX_CPU		0x800000
   19.14 -#ifdef USE_ASMBLIT
   19.15 -#define CPU_Flags()	Hermes_X86_CPU()
   19.16 -#else
   19.17 -#define CPU_Flags()	0L
   19.18 -#endif
   19.19 -
   19.20 -#ifdef USE_ASMBLIT
   19.21 -#define X86_ASSEMBLER
   19.22 -#define HermesConverterInterface	void
   19.23 -#define HermesClearInterface		void
   19.24 -#define STACKCALL
   19.25 -
   19.26 -#include "HeadX86.h"
   19.27 -#endif
   19.28 -
   19.29  /* The functions used to manipulate software video overlays */
   19.30  static struct private_yuvhwfuncs sw_yuvfuncs = {
   19.31  	SDL_LockYUV_SW,
   19.32 @@ -956,7 +940,7 @@
   19.33  	Uint32 *r_2_pix_alloc;
   19.34  	Uint32 *g_2_pix_alloc;
   19.35  	Uint32 *b_2_pix_alloc;
   19.36 -	int i, cpu_mmx;
   19.37 +	int i;
   19.38  	int CR, CB;
   19.39  	Uint32 Rmask, Gmask, Bmask;
   19.40  
   19.41 @@ -1082,14 +1066,13 @@
   19.42  	switch (format) {
   19.43  	    case SDL_YV12_OVERLAY:
   19.44  	    case SDL_IYUV_OVERLAY:
   19.45 -		cpu_mmx = CPU_Flags() & MMX_CPU;
   19.46  		if ( display->format->BytesPerPixel == 2 ) {
   19.47  #if defined(i386) && defined(__GNUC__) && defined(USE_ASMBLIT)
   19.48  			/* inline assembly functions */
   19.49 -			if ( cpu_mmx && (Rmask == 0xF800) &&
   19.50 -			                (Gmask == 0x07E0) &&
   19.51 -				        (Bmask == 0x001F) &&
   19.52 -			                (width & 15) == 0) {
   19.53 +			if ( SDL_HasMMX() && (Rmask == 0xF800) &&
   19.54 +			                     (Gmask == 0x07E0) &&
   19.55 +				             (Bmask == 0x001F) &&
   19.56 +			                     (width & 15) == 0) {
   19.57  /*printf("Using MMX 16-bit 565 dither\n");*/
   19.58  				swdata->Display1X = Color565DitherYV12MMX1X;
   19.59  			} else {
   19.60 @@ -1108,10 +1091,10 @@
   19.61  		if ( display->format->BytesPerPixel == 4 ) {
   19.62  #if defined(i386) && defined(__GNUC__) && defined(USE_ASMBLIT)
   19.63  			/* inline assembly functions */
   19.64 -			if ( cpu_mmx && (Rmask == 0x00FF0000) &&
   19.65 -			                (Gmask == 0x0000FF00) &&
   19.66 -				        (Bmask == 0x000000FF) && 
   19.67 -			                (width & 15) == 0) {
   19.68 +			if ( SDL_HasMMX() && (Rmask == 0x00FF0000) &&
   19.69 +			                     (Gmask == 0x0000FF00) &&
   19.70 +				             (Bmask == 0x000000FF) && 
   19.71 +			                     (width & 15) == 0) {
   19.72  /*printf("Using MMX 32-bit dither\n");*/
   19.73  				swdata->Display1X = ColorRGBDitherYV12MMX1X;
   19.74  			} else {