src/atomic/SDL_spinlock.c
changeset 5095 dceec93471e7
parent 5091 2164a79b5ca9
child 5097 b938ad843e52
     1.1 --- a/src/atomic/SDL_spinlock.c	Mon Jan 24 23:54:21 2011 -0600
     1.2 +++ b/src/atomic/SDL_spinlock.c	Tue Jan 25 17:40:06 2011 -0800
     1.3 @@ -37,20 +37,20 @@
     1.4      SDL_COMPILE_TIME_ASSERT(locksize, sizeof(*lock) == sizeof(long));
     1.5      return (InterlockedExchange((long*)lock, 1) == 0);
     1.6  
     1.7 -#elif defined(__MACOSX__)
     1.8 +#elif __MACOSX__
     1.9      return OSAtomicCompareAndSwap32Barrier(0, 1, lock);
    1.10  
    1.11 -#elif defined(HAVE_GCC_ATOMICS) || defined(HAVE_GCC_SYNC_LOCK_TEST_AND_SET)
    1.12 +#elif HAVE_GCC_ATOMICS || HAVE_GCC_SYNC_LOCK_TEST_AND_SET
    1.13      return (__sync_lock_test_and_set(lock, 1) == 0);
    1.14  
    1.15 -#elif defined(__GNUC__) && defined(__arm__) && defined(__ARM_ARCH_5__)
    1.16 +#elif __GNUC__ && __arm__ && __ARM_ARCH_5__
    1.17      int result;
    1.18      __asm__ __volatile__ (
    1.19          "swp %0, %1, [%2]\n"
    1.20          : "=&r,&r" (result) : "r,0" (1), "r,r" (lock) : "memory");
    1.21      return (result == 0);
    1.22  
    1.23 -#elif defined(__GNUC__) && defined(__arm__)
    1.24 +#elif __GNUC__ && __arm__
    1.25      int result;
    1.26      __asm__ __volatile__ (
    1.27          "ldrex %0, [%2]\nteq   %0, #0\nstrexeq %0, %1, [%2]"
    1.28 @@ -75,8 +75,16 @@
    1.29  void
    1.30  SDL_AtomicUnlock(SDL_SpinLock *lock)
    1.31  {
    1.32 -    /* Assuming atomic assignment operation and full memory barrier in lock */
    1.33 +#if defined(_MSC_VER)
    1.34 +    _ReadWriteBarrier();
    1.35      *lock = 0;
    1.36 +
    1.37 +#elif HAVE_GCC_ATOMICS || HAVE_GCC_SYNC_LOCK_TEST_AND_SET
    1.38 +    __sync_lock_release(lock);
    1.39 +
    1.40 +#else
    1.41 +    *lock = 0;
    1.42 +#endif
    1.43  }
    1.44  
    1.45  /* vi: set ts=4 sw=4 expandtab: */