include/SDL_atomic.h
changeset 7393 358696c354a8
parent 7191 75360622e65f
child 7394 38dc4961ab15
     1.1 --- a/include/SDL_atomic.h	Wed Jul 10 02:37:57 2013 -0700
     1.2 +++ b/include/SDL_atomic.h	Wed Jul 10 18:31:17 2013 -0700
     1.3 @@ -45,6 +45,7 @@
     1.4   *
     1.5   * There's also lots of good information here:
     1.6   * http://www.1024cores.net/home/lock-free-algorithms
     1.7 + * http://preshing.com/
     1.8   *
     1.9   * These operations may or may not actually be implemented using
    1.10   * processor specific atomic operations. When possible they are
    1.11 @@ -135,6 +136,32 @@
    1.12  { SDL_SpinLock _tmp = 0; SDL_AtomicLock(&_tmp); SDL_AtomicUnlock(&_tmp); }
    1.13  #endif
    1.14  
    1.15 +/**
    1.16 + * Memory barriers are designed to prevent reads and writes from being
    1.17 + * reordered by the compiler and being seen out of order on multi-core CPUs.
    1.18 + *
    1.19 + * A typical pattern would be for thread A to write some data and a flag,
    1.20 + * and for thread B to read the flag and get the data. In this case you
    1.21 + * would insert a release barrier between writing the data and the flag,
    1.22 + * guaranteeing that the data write completes no later than the flag is
    1.23 + * written, and you would insert an acquire barrier between reading the
    1.24 + * flag and reading the data, to ensure that all the reads associated
    1.25 + * with the flag have completed.
    1.26 + *
    1.27 + * In this pattern you should always see a release barrier paired with
    1.28 + * an acquire barrier and you should gate the data reads/writes with a
    1.29 + * single flag variable.
    1.30 + *
    1.31 + * For more information on these semantics, take a look at the blog post:
    1.32 + * http://preshing.com/20120913/acquire-and-release-semantics
    1.33 + */
    1.34 +/* FIXME: This is correct for x86 and x64 but not other CPUs
    1.35 +   For PPC we need the lwsync instruction, and on ARM some variant of dmb
    1.36 + */
    1.37 +#define SDL_MemoryBarrierRelease()  SDL_CompilerBarrier()
    1.38 +#define SDL_MemoryBarrierAcquire()  SDL_CompilerBarrier()
    1.39 +
    1.40 +
    1.41  /* Platform specific optimized versions of the atomic functions,
    1.42   * you can disable these by defining SDL_DISABLE_ATOMIC_INLINE
    1.43   */