src/atomic/SDL_spinlock.c
changeset 5957 9a2b091abb2c
parent 5956 c7aebf1841ca
child 5998 e9b9ef14aef4
equal deleted inserted replaced
5956:c7aebf1841ca 5957:9a2b091abb2c
    53 
    53 
    54 #elif defined(_MSC_VER)
    54 #elif defined(_MSC_VER)
    55     SDL_COMPILE_TIME_ASSERT(locksize, sizeof(*lock) == sizeof(long));
    55     SDL_COMPILE_TIME_ASSERT(locksize, sizeof(*lock) == sizeof(long));
    56     return (InterlockedExchange((long*)lock, 1) == 0);
    56     return (InterlockedExchange((long*)lock, 1) == 0);
    57 
    57 
    58 #elif defined(__MACOSX__)
       
    59     return OSAtomicCompareAndSwap32Barrier(0, 1, lock);
       
    60 
       
    61 #elif HAVE_GCC_ATOMICS || HAVE_GCC_SYNC_LOCK_TEST_AND_SET
    58 #elif HAVE_GCC_ATOMICS || HAVE_GCC_SYNC_LOCK_TEST_AND_SET
    62     return (__sync_lock_test_and_set(lock, 1) == 0);
    59     return (__sync_lock_test_and_set(lock, 1) == 0);
    63 
    60 
    64 #elif defined(__GNUC__) && defined(__arm__) && \
    61 #elif defined(__GNUC__) && defined(__arm__) && \
    65         (defined(__ARM_ARCH_4__) || defined(__ARM_ARCH_4T__) || \
    62         (defined(__ARM_ARCH_4__) || defined(__ARM_ARCH_4T__) || \
    75     __asm__ __volatile__ (
    72     __asm__ __volatile__ (
    76         "ldrex %0, [%2]\nteq   %0, #0\nstrexeq %0, %1, [%2]"
    73         "ldrex %0, [%2]\nteq   %0, #0\nstrexeq %0, %1, [%2]"
    77         : "=&r" (result) : "r" (1), "r" (lock) : "cc", "memory");
    74         : "=&r" (result) : "r" (1), "r" (lock) : "cc", "memory");
    78     return (result == 0);
    75     return (result == 0);
    79 
    76 
       
    77 #elif defined(__GNUC__) && (defined(__i386__) || defined(__x86_64__))
       
    78 	int result;
       
    79 	__asm__ __volatile__(
       
    80         "lock ; xchgl %0, (%1)\n"
       
    81         : "=r" (result) : "r" (lock), "0" (1) : "cc", "memory");
       
    82 	return (result == 0);
       
    83 
       
    84 #elif defined(__MACOSX__)
       
    85     /* Maybe used for PowerPC, but the Intel asm or gcc atomics are favored. */
       
    86     return OSAtomicCompareAndSwap32Barrier(0, 1, lock);
       
    87 
    80 #elif HAVE_PTHREAD_SPINLOCK
    88 #elif HAVE_PTHREAD_SPINLOCK
    81     /* pthread instructions */
    89     /* pthread instructions */
    82     return (pthread_spin_trylock(lock) == 0);
    90     return (pthread_spin_trylock(lock) == 0);
    83 #else	
    91 
       
    92 #else
    84 #error Please implement for your platform.
    93 #error Please implement for your platform.
    85     return SDL_FALSE;
    94     return SDL_FALSE;
    86 #endif
    95 #endif
    87 }
    96 }
    88 
    97