Skip to content
This repository has been archived by the owner on Feb 11, 2021. It is now read-only.

Latest commit

 

History

History
118 lines (96 loc) · 3.59 KB

SDL_atomic.c

File metadata and controls

118 lines (96 loc) · 3.59 KB
 
1
2
/*
Simple DirectMedia Layer
Feb 15, 2013
Feb 15, 2013
3
Copyright (C) 1997-2013 Sam Lantinga <slouken@libsdl.org>
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
This software is provided 'as-is', without any express or implied
warranty. In no event will the authors be held liable for any damages
arising from the use of this software.
Permission is granted to anyone to use this software for any purpose,
including commercial applications, and to alter it and redistribute it
freely, subject to the following restrictions:
1. The origin of this software must not be misrepresented; you must not
claim that you wrote the original software. If you use this software
in a product, an acknowledgment in the product documentation would be
appreciated but is not required.
2. Altered source versions must be plainly marked as such, and must not be
misrepresented as being the original software.
3. This notice may not be removed or altered from any source distribution.
*/
#include "SDL_config.h"
#include "SDL_atomic.h"
/* Note that we undefine the atomic operations here, in case they are
defined as compiler intrinsics while building SDL but the library user
doesn't have that compiler. That way we always have a working set of
atomic operations built into the library.
*/
Mar 8, 2013
Mar 8, 2013
30
31
#undef SDL_AtomicCAS
#undef SDL_AtomicCASPtr
May 18, 2013
May 18, 2013
32
33
/*
34
35
36
37
38
39
40
41
42
If any of the operations are not provided then we must emulate some
of them. That means we need a nice implementation of spin locks
that avoids the "one big lock" problem. We use a vector of spin
locks and pick which one to use based on the address of the operand
of the function.
To generate the index of the lock we first shift by 3 bits to get
rid on the zero bits that result from 32 and 64 bit allignment of
data. We then mask off all but 5 bits and use those 5 bits as an
May 18, 2013
May 18, 2013
43
index into the table.
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
Picking the lock this way insures that accesses to the same data at
the same time will go to the same lock. OTOH, accesses to different
data have only a 1/32 chance of hitting the same lock. That should
pretty much eliminate the chances of several atomic operations on
different data from waiting on the same "big lock". If it isn't
then the table of locks can be expanded to a new size so long as
the new size is a power of two.
Contributed by Bob Pendleton, bob@pendleton.com
*/
static SDL_SpinLock locks[32];
static __inline__ void
enterLock(void *a)
{
uintptr_t index = ((((uintptr_t)a) >> 3) & 0x1f);
SDL_AtomicLock(&locks[index]);
}
static __inline__ void
leaveLock(void *a)
{
uintptr_t index = ((((uintptr_t)a) >> 3) & 0x1f);
SDL_AtomicUnlock(&locks[index]);
}
Mar 8, 2013
Mar 8, 2013
74
75
DECLSPEC SDL_bool SDLCALL
SDL_AtomicCAS(SDL_atomic_t *a, int oldval, int newval)
76
77
78
79
80
81
82
83
84
85
86
87
88
{
SDL_bool retval = SDL_FALSE;
enterLock(a);
if (a->value == oldval) {
a->value = newval;
retval = SDL_TRUE;
}
leaveLock(a);
return retval;
}
Mar 8, 2013
Mar 8, 2013
89
90
DECLSPEC SDL_bool SDLCALL
SDL_AtomicCASPtr(void **a, void *oldval, void *newval)
91
92
93
94
95
96
97
98
99
100
101
102
103
{
SDL_bool retval = SDL_FALSE;
enterLock(a);
if (*a == oldval) {
*a = newval;
retval = SDL_TRUE;
}
leaveLock(a);
return retval;
}
Jul 11, 2013
Jul 11, 2013
104
105
106
107
108
109
110
111
112
113
114
115
116
117
#if defined(__GNUC__) && defined(__arm__) && \
(defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_6J__) || defined(__ARM_ARCH_6K__) || defined(__ARM_ARCH_6T2__) || defined(__ARM_ARCH_6Z__) || defined(__ARM_ARCH_6ZK__))
__asm__(
" .align 2\n"
" .globl _SDL_MemoryBarrierRelease\n"
" .globl _SDL_MemoryBarrierAcquire\n"
"_SDL_MemoryBarrierRelease:\n"
"_SDL_MemoryBarrierAcquire:\n"
" mov r0, #0\n"
" mcr p15, 0, r0, c7, c10, 5\n"
" bx lr\n"
);
#endif /* __GNUC__ && __arm__ && ARMV6 */
118
/* vi: set ts=4 sw=4 expandtab: */