src/atomic/SDL_atomic.c
author Sam Lantinga <slouken@libsdl.org>
Sun, 01 Jan 2017 18:33:28 -0800
changeset 10737 3406a0f8b041
parent 9998 f67cf37e9cd4
child 10879 773cbb61ad27
permissions -rw-r--r--
Updated copyright for 2017
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/*
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  Simple DirectMedia Layer
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  Copyright (C) 1997-2017 Sam Lantinga <slouken@libsdl.org>
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  This software is provided 'as-is', without any express or implied
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  warranty.  In no event will the authors be held liable for any damages
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  arising from the use of this software.
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  Permission is granted to anyone to use this software for any purpose,
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  including commercial applications, and to alter it and redistribute it
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  freely, subject to the following restrictions:
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  1. The origin of this software must not be misrepresented; you must not
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     claim that you wrote the original software. If you use this software
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     in a product, an acknowledgment in the product documentation would be
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     appreciated but is not required.
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  2. Altered source versions must be plainly marked as such, and must not be
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     misrepresented as being the original software.
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  3. This notice may not be removed or altered from any source distribution.
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*/
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#include "../SDL_internal.h"
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#include "SDL_atomic.h"
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#if defined(_MSC_VER) && (_MSC_VER >= 1500)
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#include <intrin.h>
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#define HAVE_MSC_ATOMICS 1
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#endif
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#if defined(__MACOSX__)  /* !!! FIXME: should we favor gcc atomics? */
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#include <libkern/OSAtomic.h>
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#endif
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#if !defined(HAVE_GCC_ATOMICS) && defined(__SOLARIS__)
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#include <atomic.h>
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#endif
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/*
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  If any of the operations are not provided then we must emulate some
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  of them. That means we need a nice implementation of spin locks
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  that avoids the "one big lock" problem. We use a vector of spin
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  locks and pick which one to use based on the address of the operand
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  of the function.
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  To generate the index of the lock we first shift by 3 bits to get
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  rid on the zero bits that result from 32 and 64 bit allignment of
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  data. We then mask off all but 5 bits and use those 5 bits as an
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  index into the table.
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  Picking the lock this way insures that accesses to the same data at
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  the same time will go to the same lock. OTOH, accesses to different
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  data have only a 1/32 chance of hitting the same lock. That should
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  pretty much eliminate the chances of several atomic operations on
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  different data from waiting on the same "big lock". If it isn't
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  then the table of locks can be expanded to a new size so long as
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  the new size is a power of two.
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  Contributed by Bob Pendleton, bob@pendleton.com
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*/
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#if !defined(HAVE_MSC_ATOMICS) && !defined(HAVE_GCC_ATOMICS) && !defined(__MACOSX__) && !defined(__SOLARIS__)
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#define EMULATE_CAS 1
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#endif
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#if EMULATE_CAS
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static SDL_SpinLock locks[32];
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static SDL_INLINE void
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enterLock(void *a)
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{
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    uintptr_t index = ((((uintptr_t)a) >> 3) & 0x1f);
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    SDL_AtomicLock(&locks[index]);
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}
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static SDL_INLINE void
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leaveLock(void *a)
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{
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    uintptr_t index = ((((uintptr_t)a) >> 3) & 0x1f);
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    SDL_AtomicUnlock(&locks[index]);
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}
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#endif
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SDL_bool
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SDL_AtomicCAS(SDL_atomic_t *a, int oldval, int newval)
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{
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#ifdef HAVE_MSC_ATOMICS
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    return (_InterlockedCompareExchange((long*)&a->value, (long)newval, (long)oldval) == (long)oldval);
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#elif defined(__MACOSX__)  /* !!! FIXME: should we favor gcc atomics? */
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    return (SDL_bool) OSAtomicCompareAndSwap32Barrier(oldval, newval, &a->value);
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#elif defined(HAVE_GCC_ATOMICS)
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    return (SDL_bool) __sync_bool_compare_and_swap(&a->value, oldval, newval);
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#elif defined(__SOLARIS__) && defined(_LP64)
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    return (SDL_bool) ((int) atomic_cas_64((volatile uint64_t*)&a->value, (uint64_t)oldval, (uint64_t)newval) == oldval);
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#elif defined(__SOLARIS__) && !defined(_LP64)
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    return (SDL_bool) ((int) atomic_cas_32((volatile uint32_t*)&a->value, (uint32_t)oldval, (uint32_t)newval) == oldval);
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#elif EMULATE_CAS
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    SDL_bool retval = SDL_FALSE;
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    enterLock(a);
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    if (a->value == oldval) {
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        a->value = newval;
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        retval = SDL_TRUE;
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    }
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    leaveLock(a);
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    return retval;
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#else
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    #error Please define your platform.
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#endif
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}
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SDL_bool
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SDL_AtomicCASPtr(void **a, void *oldval, void *newval)
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{
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#if defined(HAVE_MSC_ATOMICS) && (_M_IX86)
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    return (_InterlockedCompareExchange((long*)a, (long)newval, (long)oldval) == (long)oldval);
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#elif defined(HAVE_MSC_ATOMICS) && (!_M_IX86)
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    return (_InterlockedCompareExchangePointer(a, newval, oldval) == oldval);
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#elif defined(__MACOSX__) && defined(__LP64__)   /* !!! FIXME: should we favor gcc atomics? */
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    return (SDL_bool) OSAtomicCompareAndSwap64Barrier((int64_t)oldval, (int64_t)newval, (int64_t*) a);
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#elif defined(__MACOSX__) && !defined(__LP64__)  /* !!! FIXME: should we favor gcc atomics? */
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    return (SDL_bool) OSAtomicCompareAndSwap32Barrier((int32_t)oldval, (int32_t)newval, (int32_t*) a);
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#elif defined(HAVE_GCC_ATOMICS)
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    return __sync_bool_compare_and_swap(a, oldval, newval);
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#elif defined(__SOLARIS__)
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    return (SDL_bool) (atomic_cas_ptr(a, oldval, newval) == oldval);
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#elif EMULATE_CAS
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    SDL_bool retval = SDL_FALSE;
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    enterLock(a);
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    if (*a == oldval) {
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        *a = newval;
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        retval = SDL_TRUE;
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    }
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    leaveLock(a);
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    return retval;
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#else
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    #error Please define your platform.
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#endif
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}
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int
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SDL_AtomicSet(SDL_atomic_t *a, int v)
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{
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#ifdef HAVE_MSC_ATOMICS
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    return _InterlockedExchange((long*)&a->value, v);
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#elif defined(HAVE_GCC_ATOMICS)
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    return __sync_lock_test_and_set(&a->value, v);
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#elif defined(__SOLARIS__) && defined(_LP64)
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    return (int) atomic_swap_64((volatile uint64_t*)&a->value, (uint64_t)v);
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#elif defined(__SOLARIS__) && !defined(_LP64)
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    return (int) atomic_swap_32((volatile uint32_t*)&a->value, (uint32_t)v);
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#else
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    int value;
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    do {
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        value = a->value;
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    } while (!SDL_AtomicCAS(a, value, v));
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    return value;
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#endif
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}
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void*
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SDL_AtomicSetPtr(void **a, void *v)
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{
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#if defined(HAVE_MSC_ATOMICS) && (_M_IX86)
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    return (void *) _InterlockedExchange((long *)a, (long) v);
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#elif defined(HAVE_MSC_ATOMICS) && (!_M_IX86)
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    return _InterlockedExchangePointer(a, v);
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#elif defined(HAVE_GCC_ATOMICS)
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    return __sync_lock_test_and_set(a, v);
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#elif defined(__SOLARIS__)
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    return atomic_swap_ptr(a, v);
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#else
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    void *value;
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    do {
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        value = *a;
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    } while (!SDL_AtomicCASPtr(a, value, v));
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    return value;
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#endif
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}
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int
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SDL_AtomicAdd(SDL_atomic_t *a, int v)
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{
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#ifdef HAVE_MSC_ATOMICS
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    return _InterlockedExchangeAdd((long*)&a->value, v);
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#elif defined(HAVE_GCC_ATOMICS)
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    return __sync_fetch_and_add(&a->value, v);
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#elif defined(__SOLARIS__)
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    int pv = a->value;
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    membar_consumer();
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#if defined(_LP64)
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    atomic_add_64((volatile uint64_t*)&a->value, v);
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#elif !defined(_LP64)
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    atomic_add_32((volatile uint32_t*)&a->value, v);
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#endif
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    return pv;
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#else
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    int value;
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    do {
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        value = a->value;
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    } while (!SDL_AtomicCAS(a, value, (value + v)));
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    return value;
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#endif
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}
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int
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SDL_AtomicGet(SDL_atomic_t *a)
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{
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    int value;
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    do {
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        value = a->value;
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    } while (!SDL_AtomicCAS(a, value, value));
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    return value;
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}
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void *
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SDL_AtomicGetPtr(void **a)
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{
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    void *value;
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    do {
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        value = *a;
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    } while (!SDL_AtomicCASPtr(a, value, value));
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    return value;
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}
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#ifdef __thumb__
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#if defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_6J__) || defined(__ARM_ARCH_6K__) || defined(__ARM_ARCH_6T2__) || defined(__ARM_ARCH_6Z__) || defined(__ARM_ARCH_6ZK__)
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__asm__(
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"   .align 2\n"
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"   .globl _SDL_MemoryBarrierRelease\n"
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"   .globl _SDL_MemoryBarrierAcquire\n"
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"_SDL_MemoryBarrierRelease:\n"
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"_SDL_MemoryBarrierAcquire:\n"
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"   mov r0, #0\n"
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"   mcr p15, 0, r0, c7, c10, 5\n"
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"   bx lr\n"
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);
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#endif
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#endif
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/* vi: set ts=4 sw=4 expandtab: */