/*

SDL - Simple DirectMedia Layer

This library is free software; you can redistribute it and/or

This library is distributed in the hope that it will be useful,

but WITHOUT ANY WARRANTY; without even the implied warranty of

MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU

You should have received a copy of the GNU Lesser General Public

License along with this library; if not, write to the Free Software

Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA

Sam Lantinga

slouken@libsdl.org

*/

/* CPU feature detection for SDL */

#include "SDL.h"

#include "SDL_cpuinfo.h"

#elif defined(__OpenBSD__) && defined(__powerpc__)

#include <sys/param.h>

#include <sys/sysctl.h> /* For AltiVec check */

#include <machine/cpu.h>

#elif SDL_ALTIVEC_BLITTERS && HAVE_SETJMP

#include <signal.h>

#include <setjmp.h>

#endif

#define CPU_HAS_RDTSC 0x00000001

#define CPU_HAS_MMX 0x00000002

#define CPU_HAS_MMXEXT 0x00000004

#define CPU_HAS_3DNOW 0x00000010

#define CPU_HAS_3DNOWEXT 0x00000020

#define CPU_HAS_SSE 0x00000040

#define CPU_HAS_SSE2 0x00000080

#define CPU_HAS_ALTIVEC 0x00000100

/* This is the brute force way of detecting instruction sets...

the idea is borrowed from the libmpeg2 library - thanks!

*/

static jmp_buf jmpbuf;

static void illegal_instruction(int sig)

{

longjmp(jmpbuf, 1);

}

{

int has_CPUID = 0;

#if defined(__GNUC__) && defined(i386)

__asm__ (

" pushfl # Get original EFLAGS \n"

" popl %%eax \n"

" movl %%eax,%%ecx \n"

" xorl $0x200000,%%eax # Flip ID bit in EFLAGS \n"

" pushl %%eax # Save new EFLAGS value on stack \n"

" popfl # Replace current EFLAGS value \n"

" pushfl # Get new EFLAGS \n"

" popl %%eax # Store new EFLAGS in EAX \n"

" xorl %%ecx,%%eax # Can not toggle ID bit, \n"

" jz 1f # Processor=80486 \n"

" movl $1,%0 # We have CPUID support \n"

"1: \n"

:

: "%eax", "%ecx"

);

#elif defined(__GNUC__) && defined(__x86_64__)

/* Technically, if this is being compiled under __x86_64__ then it has

CPUid by definition. But it's nice to be able to prove it. :) */

__asm__ (

" pushfq # Get original EFLAGS \n"

" popq %%rax \n"

" movq %%rax,%%rcx \n"

" xorl $0x200000,%%eax # Flip ID bit in EFLAGS \n"

" pushq %%rax # Save new EFLAGS value on stack \n"

" popfq # Replace current EFLAGS value \n"

" pushfq # Get new EFLAGS \n"

" popq %%rax # Store new EFLAGS in EAX \n"

" xorl %%ecx,%%eax # Can not toggle ID bit, \n"

" jz 1f # Processor=80486 \n"

" movl $1,%0 # We have CPUID support \n"

"1: \n"

: "=m" (has_CPUID)

:

: "%rax", "%rcx"

);

pushfd ; Get original EFLAGS

pop eax

mov ecx, eax

xor eax, 200000h ; Flip ID bit in EFLAGS

push eax ; Save new EFLAGS value on stack

popfd ; Replace current EFLAGS value

pushfd ; Get new EFLAGS

pop eax ; Store new EFLAGS in EAX

xor eax, ecx ; Can not toggle ID bit,

jz done ; Processor=80486

mov has_CPUID,1 ; We have CPUID support

done:

}

" popl %eax \n"

" movl %eax,%ecx \n"

" xorl $0x200000,%eax \n"

" pushl %eax \n"

" popfl \n"

" pushfl \n"

" popl %eax \n"

" xorl %ecx,%eax \n"

" jz 1f \n"

" movl $1,-8(%ebp) \n"

"1: \n"

);

#elif defined(__sun) && defined(__amd64)

__asm (

" pushfq \n"

" popq %rax \n"

" movq %rax,%rcx \n"

" xorl $0x200000,%eax \n"

" pushq %rax \n"

" popfq \n"

" pushfq \n"

" popq %rax \n"

" xorl %ecx,%eax \n"

" jz 1f \n"

" movl $1,-8(%rbp) \n"

"1: \n"

);

#endif

return has_CPUID;

}

{

int features = 0;

__asm__ (

" xorl %%eax,%%eax # Set up for CPUID instruction \n"

" cmpl $1,%%eax # Make sure 1 is valid input for CPUID\n"

" jl 1f # We dont have the CPUID instruction\n"

" xorl %%eax,%%eax \n"

" incl %%eax \n"

" movl %%edx,%0 \n"

"1: \n"

#elif defined(__GNUC__) && defined(__x86_64__)

__asm__ (

" xorl %%eax,%%eax # Set up for CPUID instruction \n"

" cmpl $1,%%eax # Make sure 1 is valid input for CPUID\n"

" jl 1f # We dont have the CPUID instruction\n"

" xorl %%eax,%%eax \n"

" incl %%eax \n"

" movl %%edx,%0 \n"

"1: \n"

: "=m" (features)

:

cmp eax, 1 ; Make sure 1 is valid input for CPUID

jl done ; We dont have the CPUID instruction

xor eax, eax

inc eax

mov features, edx

done:

}

__asm(

" xorl %eax,%eax \n"

" cmpl $1,%eax \n"

" jl 1f \n"

" xorl %eax,%eax \n"

" incl %eax \n"

#ifdef __i386

" movl %edx,-8(%ebp) \n"

#else

" movl %edx,-8(%rbp) \n"

#endif

"1: \n"

#endif

return features;

}

__asm__ (

" movl $0x80000000,%%eax # Query for extended functions \n"

#elif defined(__GNUC__) && defined (__x86_64__)

__asm__ (

" movl $0x80000000,%%eax # Query for extended functions \n"

" cmpl $0x80000001,%%eax \n"

" jl 1f # Nope, we dont have function 800000001h\n"

" movl $0x80000001,%%eax # Setup extended function 800000001h\n"

" movl %%edx,%0 \n"

"1: \n"

: "=m" (features)

:

done:

}

#elif defined(__sun) && ( defined(__i386) || defined(__amd64) )

__asm (

" movl $0x80000000,%eax \n"

" cmpl $0x80000001,%eax \n"

" jl 1f \n"

" movl $0x80000001,%eax \n"

#ifdef __i386

" movl %edx,-8(%ebp) \n"

#else

" movl %edx,-8(%rbp) \n"

#endif

"1: \n"

);

return features;

}

{

if ( CPU_haveCPUID() ) {

return (CPU_getCPUIDFeatures() & 0x00000010);

}

return 0;

}

{

if ( CPU_haveCPUID() ) {

return (CPU_getCPUIDFeatures() & 0x00800000);

}

return 0;

}

{

if ( CPU_haveCPUID() ) {

return (CPU_getCPUIDFeaturesExt() & 0x00400000);

}

return 0;

}

{

if ( CPU_haveCPUID() ) {

return (CPU_getCPUIDFeaturesExt() & 0x80000000);

}

return 0;

}

{

if ( CPU_haveCPUID() ) {

return (CPU_getCPUIDFeaturesExt() & 0x40000000);

}

return 0;

}

{

if ( CPU_haveCPUID() ) {

return (CPU_getCPUIDFeatures() & 0x02000000);

}

return 0;

}

{

if ( CPU_haveCPUID() ) {

return (CPU_getCPUIDFeatures() & 0x04000000);

}

return 0;

}

#if (defined(__MACOSX__) && (defined(__ppc__) || defined(__ppc64__))) || (defined(__OpenBSD__) && defined(__powerpc__))

# ifdef __OpenBSD__

int selectors[2] = { CTL_MACHDEP, CPU_ALTIVEC };

# else

int selectors[2] = { CTL_HW, HW_VECTORUNIT };

# endif

int hasVectorUnit = 0;

size_t length = sizeof(hasVectorUnit);

int error = sysctl(selectors, 2, &hasVectorUnit, &length, NULL, 0);

if( 0 == error )

void (*handler)(int sig);

handler = signal(SIGILL, illegal_instruction);

if ( setjmp(jmpbuf) == 0 ) {

asm volatile ("mtspr 256, %0\n\t"

"vand %%v0, %%v0, %%v0"

:

: "r" (-1));

altivec = 1;

}

signal(SIGILL, handler);

}

#ifdef __linux__

#include <unistd.h>

#include <sys/types.h>

#include <sys/stat.h>

#include <fcntl.h>

#include <elf.h>

static __inline__ int CPU_haveARMSIMD(void)

{

int arm_simd = 0;

int fd;

fd = open("/proc/self/auxv", O_RDONLY);

if (fd >= 0)

{

Elf32_auxv_t aux;

while (read(fd, &aux, sizeof aux) == sizeof aux)

{

if (aux.a_type == AT_PLATFORM)

{

const char *plat = (const char *) aux.a_un.a_val;

arm_simd = strncmp(plat, "v6l", 3) == 0 ||

strncmp(plat, "v7l", 3) == 0;

}

}

close(fd);

}

return arm_simd;

}

static __inline__ int CPU_haveARMNEON(void)

{

int arm_neon = 0;

int fd;

fd = open("/proc/self/auxv", O_RDONLY);

if (fd >= 0)

{

Elf32_auxv_t aux;

while (read(fd, &aux, sizeof aux) == sizeof aux)

{

if (aux.a_type == AT_HWCAP)

arm_neon = (aux.a_un.a_val & 4096) != 0;

}

close(fd);

}

return arm_neon;

}

#elif defined(__RISCOS__)

#include <kernel.h>

#include <swis.h>

static __inline__ int CPU_haveARMSIMD(void)

{

_kernel_swi_regs regs;

regs.r[0] = 0;

if (_kernel_swi(OS_PlatformFeatures, &regs, &regs) != NULL)

return 0;

if (!(regs.r[0] & (1<<31)))

return 0;

regs.r[0] = 34;

regs.r[1] = 29;

if (_kernel_swi(OS_PlatformFeatures, &regs, &regs) != NULL)

return 0;

return regs.r[0];

}

static __inline__ int CPU_haveARMNEON(void)

{

/* Use the VFPSupport_Features SWI to access the MVFR registers */

_kernel_swi_regs regs;

regs.r[0] = 0;

if (_kernel_swi(VFPSupport_Features, &regs, &regs) == NULL) {

if ((regs.r[2] & 0xFFF000) == 0x111000) {

return 1;

}

}

return 0;

}

#else

static __inline__ int CPU_haveARMSIMD(void)

{

return 0;

}

static __inline__ int CPU_haveARMNEON(void)

{

return 0;

}

#endif

static Uint32 SDL_CPUFeatures = 0xFFFFFFFF;

{

if ( SDL_CPUFeatures == 0xFFFFFFFF ) {

SDL_CPUFeatures = 0;

if ( CPU_haveRDTSC() ) {

SDL_CPUFeatures |= CPU_HAS_RDTSC;

}

if ( CPU_haveMMX() ) {

SDL_CPUFeatures |= CPU_HAS_MMX;

}

if ( CPU_haveMMXExt() ) {

SDL_CPUFeatures |= CPU_HAS_MMXEXT;

}

if ( CPU_have3DNow() ) {

SDL_CPUFeatures |= CPU_HAS_3DNOW;

}

if ( CPU_have3DNowExt() ) {

SDL_CPUFeatures |= CPU_HAS_3DNOWEXT;

}

if ( CPU_haveSSE() ) {

SDL_CPUFeatures |= CPU_HAS_SSE;

}

if ( CPU_haveSSE2() ) {

SDL_CPUFeatures |= CPU_HAS_SSE2;

}

if ( CPU_haveAltiVec() ) {

SDL_CPUFeatures |= CPU_HAS_ALTIVEC;

}

if ( CPU_haveARMSIMD() ) {

SDL_CPUFeatures |= CPU_HAS_ARM_SIMD;

}

if ( CPU_haveARMNEON() ) {

SDL_CPUFeatures |= CPU_HAS_ARM_NEON;

}

}

return SDL_CPUFeatures;

}

{

if ( SDL_GetCPUFeatures() & CPU_HAS_RDTSC ) {

return SDL_TRUE;

}

return SDL_FALSE;

}

{

if ( SDL_GetCPUFeatures() & CPU_HAS_MMX ) {

return SDL_TRUE;

}

return SDL_FALSE;

}

return SDL_TRUE;

}

return SDL_FALSE;

}

return SDL_TRUE;

}

return SDL_FALSE;

}

return SDL_TRUE;

}

return SDL_FALSE;

}

if ( SDL_GetCPUFeatures() & CPU_HAS_SSE ) {

return SDL_TRUE;

}

return SDL_FALSE;

}

if ( SDL_GetCPUFeatures() & CPU_HAS_SSE2 ) {

return SDL_TRUE;

}

return SDL_FALSE;

}

if ( SDL_GetCPUFeatures() & CPU_HAS_ALTIVEC ) {

return SDL_TRUE;

}

return SDL_FALSE;

}

SDL_bool SDL_HasARMSIMD(void)

{

if ( SDL_GetCPUFeatures() & CPU_HAS_ARM_SIMD ) {

return SDL_TRUE;

}

return SDL_FALSE;

}